具循環位移正交鍵之單載波/多載波展頻收發機設計與FPGA實現

Transceiver Design and FPGA Implementation of Single/Multi-Carrier Spread Spectrum System with Cyclic Shift Orthogonal Keying

李政達(Jeng-Da Li)

指導教授 ： 黃正光

元智大學/電機通訊學院/通訊工程學系/碩士(2008年)

摘要

在本論文中，吾人設計並實現使用循環位移正交碼鍵移(CSOK)的新系列展頻(SS)系統。為了更進一步提昇資料傳輸率，將介紹結合CSOK符碼和基礎數位通訊符碼的混合式循環位移正交碼鍵移(HCSOK)系統，並且推導該系統應用於多載波(MC)及單載波(SC)下的最大似然法則(ML)接收機及錯誤性能。在此設計中，推導和模擬的結果皆顯示了MC和SC HCSOK系統在白高斯雜訊(AWGN)通道下具有相同的錯誤率。為維持在高殘餘頻率誤差(CFO)下的強健性,吾人提出具非同調接收機之DQPSK-HCSOK系統，並與同調QPSK-HCSOK進行模擬比較，以証實其強健性。
接下來，吾人訂定一使用DQPSK-HCSOK調變之單載波/多載波雙模封包傳輸系統。根據所定義的封包及序文架構，將設計出完整的接收機架構，包含封包偵測、載波頻率誤差估測及通道估測等同步機制。模擬結果顯示，此接收機架構相較於完美同步條件下，在AWGN及多路徑衰減通道下分別有1dB 和2 dB的損失。
最後，吾人利用模組化設計流程，將所設計的單載波/多載波雙模系統實現在FPGA平台上。此定點硬體架構最高可在97.276 MHz運行，而在8%的封包遺失/錯誤率(PLER)下造成小於0.1 dB的實現損失。實驗結果並顯示，相較於多載波DQPSK-HCSOK系統，單載波系統之整體的收發機僅需約80%的資源使用量，更為精簡實用。

關鍵字

展頻 ； 單載波 ； 多載波 ； 偱環位移正交鍵

並列摘要

In this thesis, a new-class of spread spectrum (SS) structures using cyclic code shift keying (CSOK) are designed and realized. To further increase data rate, the Hybrid- CSOK (HCSOK) system which combines the CSOK symbol and basic digital communication symbols is introduced. The ML receivers and BER performance of HCSOK systems are derived both for multi-carrier (MC) and single-carrier (SC) cases. The derived and simulation results show that the MC and SC HCSOK systems have the same performance. In order to maintain a robust performance under high residual carrier frequency offset (CFO), the DQPSK-HCSOK systems with non-coherent receiver are then proposed, and compared to the coherent QPSK-HCSOK system to confirm its robustness.
After designing the modulation scheme, a dual mode packet-based DQPSK-HCSOK system is defined. The receiver synchronization scheme for the designed preamble structure, including the packet detector, CFO estimator, and channel estimator is then designed. The overall system simulation shows that the overall receiver incurs a 1-dB loss and 2-dB loss under AWGN channel and multipath fading channel respectively, as compared with ideal synchronization case.
Finally, we implement the MC/SC DQPSK-HCSOK systems onto Xilinx XtremeDSP FPGA platform using model-based design flow. The designed hardware fixed point architecture, which can run at a maximum frequency of 97.276 MHz, only suffer from a slightly loss less than 0.1dB at a PLER of 8% comparing to the floating-point simulation results. Besides, it is noted that the SC DQPSK-HCSOK transceiver saves a lot of FPGA resource in comparison with the MC DQPSK-HCSOK system.

並列關鍵字

spread spectrum ； single carrier ； multi-carrier ； cyclic code orthogonal keying (CSOK)

參考文獻

[4] Cook and Marsh, ”An Introduction to Spread Spectrum,” IEEE Commun. Mag., pp. 8-16, Mar 1983

[5] S. Hara and R. Prasad, “Overview of Multicarrier CDMA,” IEEE Commun. Mag., vol.35, Dec. 1997, pp.126-33

[7] S. H. Han and J. H. Lee, “ An Overview of Peak-to-Average-Power-Ratio Reduction Technique for Multi-carrier Transmission,” IEEE Wireless Commun., vol. 12, pp. 55-65, April 2005

[9] D. C. Chu, “Polyphase Codes with good periodic correlation properties,“ IEEE Trans. Inform. Theory, vol. 18, no.4, pp. 531-532, 1972

[10] R. L Frank and S.A. Zadoff, “Phase Shift Codes with Good Periodic Correlation Properties,” IRE Trans. Info. Theory, Oct. 1962, pp. 381–82.