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  • 學位論文

測試資料減少使用掃描鏈壓縮與資料廣播方式

Test Data Compression Using Scan Chain Compaction and Broadcasting Scheme

指導教授 : 曾王道

摘要


本篇論文中提出一種用於scan-based架構的壓縮方法,透過在測試電路時所需要的test data,其中存在著許多的don’t care bits,而這些don’t care bits即代表它的值不論是1 or 0 都不會對測試有影響,因此這些值可以用來增加資料的相容關係,以達到減少測試資料的目的。另外,我們使用multiple scan chain 的架構,將原本的single scan chain 做分割,再以Broadcast 的方式來傳輸,以減少傳輸時間和測試資料,broadcast中最理想的情況,是由一筆test data 傳輸到所有sub-scan chain,這些sub-scan chain中的資料必需要相容,因此broadcast的效果會受到test data 中care bit數量影響,過多會對造成部份test pattern 無法命中,造成有些fault無法被偵測到,因而fault coverage下降,於此我們提出一種不同的broadcast方式來提高效率,這方法是透過增加一個de-multiplexer 來選擇目前需要broadcast的sub-scan chain起點,藉此來提升broadcast的效率。而和其它方法不同,它並不需要複雜的decoder和過多的硬體負擔,就能達到很好的壓縮率,此外,對test set 還會以scan tree的架構來減少test data,合併兩種方法大概可以達到72%的壓縮率。

關鍵字

資料壓縮 掃描鍊壓縮 廣播

並列摘要


In this paper we propose a compression method for scan testing. There are lots of test data in a test set that can be assigned 1 or 0 without affecting the test result, which are called don’t care bits(X-bits). These don't care bits can be used for increasing the compatibility of test data in order to achieve the goal of reducing test data volume. In addition, we use the structure of multiple scan chains in which original single scan chain is partitioned into several sub-scan chains. Test data are then shifted by a broadcast way for reducing test application time and test data. The best case on broadcasting is that shifting one sub-test pattern to all sub-scan chains, and test data of these sub-scan chains must be compatible. Therefore, the result of broadcasting will be influenced by the volume of care bits in test set. There are some test patterns unable to be hit which cause some faults hardly to be detected and drop the fault coverage. Hence, we propose a different broadcasting technique to increase its efficiency. It is that starting sub-scan chain of broadcasting is chosen by increasing one de-multiplexer. The difference with other methods is no complicated decoder and much hardware is needed. It can achieve very good compression rate. In addition, for reducing test data we use the structure of scan tree and combine two methods. The compression rate can reach up to 72%.

參考文獻


[1]Hamzaoglu and J. Patel,“Reducing Test Application Time for Full Scan Embedded Cores” IEEE International Symposium on Fault Tolerant Computing (FTC’99), pp. 260-267, 1999.
Yamanak,“BISTAided Scan Test – A New Method for Test Cost Reduction”VLSI Test Symposium (VTS’03), pp. 359-364, Apr. 2003.
[3]A. Al-Yamani, E. Chmelar, andM. Grinchuck,“Segmented Addressable Scan Architecture’’ Proc. 23rd IEEE VLSI Test Symp. (VTS 05), IEEE CS Press, 2005, pp. 405-411.
[4]Chao-Wen Tzeng; Shi-Yu Huang,“UMC-Scan Test Methodology: Exploiting the Maximum Freedom of Multicasting”Design & Test of Computers, IEEE Volume 25, Issue 2,March-April 2008 Page(s):132 – 140
[5]G. Hetherington, T. Fryars, N. Tamarapalli, M. Kassab, A. Hassan and J. Rajski,“Logic BIST for large industrial designs: real issues and case studies”Proc. of Int. Test Conf., pp. 358–367, Sept. 1999.

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