N型矽晶圓表面鈍化層及抗反射層之光電特性研究

Optoelectronic properties of n-type Si substrate with passivation/antireflection layer

邱啟倫

指導教授 ： 柯文政

元智大學/工程學院/先進能源碩士學位學程/碩士(2012年)

摘要

本研究利用電子迴旋共振系統(ECRCVD)在矽基板上成長10 nm的氫化非晶矽薄膜(a-Si:H)作為鈍化層，透過WCT-120載子生命期量測系統量測，矽晶片裸片之載子生命期由原本約9.12 μs提升至約60 μs。進一步嘗試利用退火製程以提升載子生命期，實驗結果發現試片在退火350 ℃時，載子生命期可提升到約75 μs。隨後我們在a-Si:H鈍化層上鍍上厚度80 nm氮化鋁膜作為抗反射層，經800 ℃退火後，在380 nm-700 nm之可見光範圍內，帄均反射率約25.54 %，但載子生命期並沒有明顯的提升，另外晶片表面出現氣泡狀击起物，因此我們降低退火溫度為350 ℃，可得到可見光範圍帄均反射率約27.82 %和載子生命期約83.1 μs。為了進一步降低抗反射層反射率，我們導入陽極氧化鋁(anodic aluminium oxide)製程在a-Si:H鈍化層上製備不同尺寸奈米等級之圖案結構，改變AAO製程包含電解液濃度、溫度、時間、電壓、次數以及AAO膜厚等參數，觀察其孔洞大小、間距和反射率之間的相互影響，歸納實驗結果，2 μm厚度AAO膜/a-Si:H/n型矽基板結構在可見光範圍內之最低反射率值可降低至19.26 %。

關鍵字

表面鈍化

並列摘要

In this study, a 10-nm-thick amorphous Si:H (a-Si:H) passivation layer was grown on the n-type Si substrate by electron cyclotron resonance plasma chemical vapor deposition system (ECRVD). The carrier lifetime of samples were measured by Sinton WCT-120 system. The carrier lifetime of raw Si substrate was 9.12 μs and increased to 60 μs for a-Si:H/n-Si substrate. In addition, the annealing process was also used to improve the lifetime of the a-Si:H/n-Si substrate. After optimized the annealing temperature to 350 ℃, a high carrier lifetime of 75 μs can be achieved. In order to decrease the reflection rate in the visible range (i.e. 380 nm-700 nm) of the n-Si substrate, we try to deposition a 80-nm-thick AlN films on a-Si:H/n-Si substrate as anti-reflection layer. The average reflection rate can be decrease to 25.54 % via 800 ℃ annealing process. However, a lot of particles were formed on the sample surface after the high temperature annealing process. Thus, we decreased the annealing temperature to 350 ℃. A low reflection rate of 27.82 % and high carrier lifetime of 83.1 μs can be achieved for AlN/a-Si:H/n-Si substrate structure. Finally, we try to fabricate the anodic aluminum oxide (AAO) membrane on a-Si:H/n-Si substrate. The pits size of AAO can
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be modified by process parameters including: catalytic concentration, temperature, time, voltage etc. The relationship between the size, depth and spacing of AAO membrane and reflection rate of samples were also studied. The experimental results indicated that the lowest reflection rate of 19.26 % can be achieved on the 2-μm-thick AAO membrane/a-Si:H/n-Si substrate.

並列關鍵字

passivation

參考文獻

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Wang, 14th Workshop on Crystalline Silicon Solar Cells and Modules, Winter

Park, Colorado, 2004

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