低溫複晶矽薄膜電晶體中汲極漏電流抑制方法之研究

Study of Drain Leakage Current Suppression Method for LTPS TFTs

張宜菁(Yi-Ching Chang)

指導教授 ： 金雅琴 ； 林崇榮

國立清華大學/電機資訊學院/電子工程研究所/碩士(2010年)

摘要

LTPS-TFTs元件，由於晶粒邊界與晶粒內之缺陷以及其較陡的汲極端接面，使其關閉時的漏電流特性與一般的MOSFETs元件不同。為了分析LTPS-TFTs元件之漏電特性，我們利用製程模擬軟體定義出元件的二維架構，再而藉由電性模擬軟體讀取經由其建構完成的元件架構，了解漏電之成因，進而提出藉由熱電洞注入降低汲極端電場的方法。論文中並模擬討論在不同量的熱電洞及儲存位置對漏電流特性之影響。在實驗方面，本論文探討熱電洞注入效應對元件的影響，利用能帶間熱電洞的注入效應，改善閘極引發汲極漏電流(Gate-induced-drain-leakage current, GIDL)，增加低溫複晶矽薄膜電晶體的開關電流比，且針對修復速度、可靠度做詳細的分析及討論，達到優越的元件特性。

關鍵字

低溫複晶矽 ； 薄膜電晶體 ； 汲極漏電流

並列摘要

LTPS-TFTs, due to the high density defects located at the grain boundary and the in-grain as well as sharper drain junction, exhibit unique off-sate leakage current characteristics. The two-dimensional process simulator was adopted for constructing the poly-Si TFT structure, and then electric characteristics of the device were then evaluated by the 2D-device simulator. In this simulation, it was found that by introducing hot holes in the dielectric film, GIDL can be effectively suppressed. Through a series of simulations, the amount as well as the location of the position charge stored in the dielectric layer for the best suppression effect is analyzed. Based on the experimental results, the GIDL current can be significantly suppressed after band-to-band hot hole (BBHH) stress. This stress method is able to increase the on/off ratio of the LTPS-TFTs. Finally, the speed of hot hole injected and the stability of the suppression effect is investigated.

並列關鍵字

Low-temperature polycrystalline-silicon (LTPS) ； Thin-film-transistor (TFT) ； Drain leakage current

參考文獻

[1]S.D. Brotherton, “Polystalline silicon thin film transistors,” Semicond. Sci. Technol., vol.10, NO.6, pp. 721-738, JUNE 1995.

[2]T. Noma, T. Yonehara, H. Kumomi, “Crystal forms by solid‐state recrystallization of amorphous Si films on SiO2,” Appl. Phys. Lett., vol. 59, NO.6, pp. 653-655, 1991.

[3]Seok-Woon Lee, Seung-Ki Joo, “Low temperature poly-Si thin-film transistor fabrication by metal-induced lateral crystallization,” IEEE Electron Device Lett., vol.17., NO.4., Aug. 2002, pp. 160 - 162.

[4]Toshiyuki Sameshima, Masaki Hara and Setsuo Usui, “XeCl Excimer Laser Annealing Used to Fabricate Poly-Si TFT's,” Jpn. J. Appl. Phys. 28, 1989, pp. 1789-1793.

[5]Sang-Hoon Jung, Woo-Jin Nam, and Min-Koo Han, “A new voltage-modulated AMOLED pixel design compensating for threshold voltage variation in poly-Si TFTs,” IEEE Electron Device Lett., vol.25., NO.10., Oct. 2004, pp. 690-692.