- 學位論文
快閃記憶體轉換層高速模擬器之開發及運用
Development and Deployment of a Fast Flash Translation Layer Simulator
並列摘要
因申請專利緣故，資料延後公開
延伸閱讀
- Chiao, M. L. (2013). 高效能快閃記憶體轉換層設計之研究 [doctoral dissertation, National Chiao Tung University]. Airiti Library. https://doi.org/10.6842/NCTU.2013.00717
- Fang, C. C. (2015). 新型高密度內嵌式分離閘快閃記憶體的開發與研究 [master's thesis, National Tsing Hua University]. Airiti Library. https://www.airitilibrary.com/Article/Detail?DocID=U0016-0312201510305641
- 葉家毅、曾展驤、丁滎隍、紀坤明、葉人傑、黃鴻杰（2011）。以高位合成設計技術實現快閃記憶體控制器。電腦與通訊，(140)，98-105。https://doi.org/10.29917/CCLTJ.201108.0015
- Chen, C. T. (2008). 快閃記憶體檔案系統、即時壓縮模型及緩衝區架構管理之研究 [doctoral dissertation, National Taipei University of Technology]. Airiti Library. https://doi.org/10.6841/NTUT.2008.00113
- Kim, S. K., Kwon, H., Lee, D. H., Noh, S. H., & Min, S. L. (2009). A Flash-Aware Cluster Allocation Scheme for Legacy File Systems. Journal of Information Science and Engineering, 25(4), 1191-1220. https://doi.org/10.6688/JISE.2009.25.4.15