新型氮氧化鈦接觸電阻式隨機存取記憶體與其載子傳輸模型

近來為了應付龐大的電子資料之保存，因此相對地須使現存的超大型積體電路記憶元件具有較佳的操作性能以及可靠度等之需求與日俱增，但當製程技術越過65奈米的世代時，將成為巨大的挑戰。興新的記憶體中可近乎這些需求的標準包括磁阻式記憶體(MRAM)，像變化記憶體(PCM)和電阻式記憶體(RRAM)皆是大有可為的參考候選，甚至以獨立化商品型式與嵌入式記憶體的應用為目標。在本論文之中，成功地展示與驗證一完全相容於90 nm互補式金氧半(CMOS)邏輯製程技術下之新穎的接觸電阻式記憶體(CR-RAM)，這元件的記憶端點是將TiN/TiON/SiO2材料堆疊於鎢接觸點(W contact)與N+矽之間以實現之。此外，它呈現了絕佳的元件特性例如：快速編程、製程簡單、免疫於重複寫入之影響、具非揮發性等，且資料的保存力於150 °C的測試溫度下更是超越了1 000小時以上。藉由電流偏壓法測定1T+1R (一電晶體一電阻) CR-RAM 自我限流之觀察，更進一步支持重置(reset)電流可以藉著利用字元線去控制設置(set)電流而使之減小。為了推展CR-RAM的切換機制，起因於電子捕捉與釋放產生的隨機電報雜訊(RTN)之量測法被用於探討CR-RAM堆疊層之特性。由RTN模型的輔助之下，量測而得的資料可被用於參數的萃取與分析，以致最終發展出一陷阱引發電阻切換之預測模型。

關鍵字

電阻式隨機存取記憶體；接觸電阻式隨機存取記憶體；記憶體；隨機電報雜訊；電阻切換模型

並列摘要

Increasing demand for better cell performance and reliability in VLSI memories is currently a great challenge beyond the 65 nm technology node. Emerging memories such as MRAM (Magnetoresistive Random Access Memory), PCM (Phase Change Memory), and RRAM (Resistive Random Access Memory) are promising candidates to meet these requirements, and are even targeted at stand-alone and embedded memory applications. This dissertation presents a novel contact RRAM (CR-RAM) realized by stacking TiN/TiON/SiO2 between W contact and N+ silicon, which is fully compatible with 90 nm CMOS logic technology. The proposed RRAM exhibits excellent performance in terms of a fast program speed, easy fabrication, and immunity to overwrite and non-volatility. Data retention is significantly over 1 000 hours under 150 °C baking conditions. An investigation of the self-compliance of the One Transistor 1T+1R CR-RAM (One Resistor Contact Resistive Random Access Memory) using the current bias method confirms that the reset current can be reduced by the word-line (WL) controlled set current. The random telegraph noise (RTN) generated by electron trapping/de-trapping on the stacking layers was also investigated to determine the CR-RAM switching mechanism. The RTN model makes it possible for parameter extraction from the measured data. Analyzing the extracted parameters and the measured results lead to a proposed trap-induced resistive switching model.

並列關鍵字

RRAM ； CRRAM ； memory ； RTN ； resistive switching model

參考文獻

Chapter 1

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[2] A. E. Rakhshani, “The role of space-charge-limited-current conduction in evaluation of the electrical properties of thin Cu2O films” J. Appl. Phys., Vol.69, No. 4, pp. 2365-2369, Feb. 1991.

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新型氮氧化鈦接觸電阻式隨機存取記憶體與其載子傳輸模型

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