減輕扇出晶圓級封裝中晶片位移之方法

A Methodology for Alleviating Die Shift of Fan-Out Wafer-Level Packaging (FOWLP)

林雪如(Lin, Hsueh Ju)

指導教授 ： 張世杰

國立清華大學/電機資訊學院/資訊工程學系/碩士(2015年)

摘要

扇出晶圓級封裝(Fan-Out Wafer-Level Packaging, FOWLP)是一種當晶片仍在晶圓上時就進行封裝的封裝型態，亦是近年來備受矚目的先進封裝之一。然而，扇出晶圓級封裝在製程中會發生「晶片位移」的問題。晶片位移使得晶片離開原先的位置，造成其與繞線層無法正確連接，因而導致晶片錯誤。許多的研究都指出：晶片會以放射狀的趨勢從晶圓中心向外位移。本論文將此趨勢納入考量，提出了兩種創新的方法來減輕晶片位移所造成的問題。而實驗結果顯示了發生晶片位移的12吋與18吋扇出晶圓級封裝，在使用我們的方法後，晶片位移的問題得以降低，其良率也因此能大幅提升。

關鍵字

晶圓級封裝 ； 扇出晶圓級封裝 ； 晶片位移 ； 浸潤式顯影

並列摘要

Fan-out Wafer Level Packaging (FOWLP), which performs the packaging of dies while still being part of the wafer, has attracted a lot of attention for advanced electronic products in recent years. However, in FOWLP, there is a mechanical problem, the die shift problem which can cause a die to be shifted away from its original position on the carrier for FOWLP. The die shift problem can lead to the misalignment of contacts and therefore cause failure of dies. It has been shown by several researches that the majority of dies are shifted away from the center. Taking into account this shifting trend, in this paper, we propose an alleviation methodology integrating two novel approaches to alleviate the die shift problem. The experiments show that the die shift of 12- and 18-inch FOWLP can be alleviated and the yield will be highly improved.

並列關鍵字

Wafer-Level Packaging (WLP) ； Fan-Out Wafer-Level Packaging (FOWLP) ； Die shift ； Immersion lithography

參考文獻

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