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  • 學位論文

整合型高壓金氧半導體元件特性及可靠度退化行為之探討

Investigation on Characteristics and Degradation Behaviors of Integrated High-Voltage MOSFET Transistors

指導教授 : 龔正 黃智方
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摘要


中文摘要 積體電路的運算速度藉著CMOS電晶體依循摩爾定律的微縮演進不斷提昇,為了實現更豐富多元性及高效能的設計,高壓元件應用在日益新穎的電子產品中的需求逐漸成長。因此,為了滿足大部分消費性電子設計規格,我們在0.18μm製程上開發了一個高壓功率元件平台(BCD platform),提供介於5V 至 70V之間操作的各種高壓元件。為了降低導通時的功率損耗,特別針對元件的導通電阻加以改善,相較於國際大廠在整合型功率元件所發表的效能,我們所提供的元件在導通電阻上達到15至40%的改善。 對於特定的應用規格,高壓元件的開發常會採用不同的結構工藝及改善技法,以提供最佳元件效能,尤其是這類的高壓功率元件平台,更要仔細考慮各元件與應用端的聯結。Kirk 效應是高壓元件中常見的現象,通常會改變元件的電場分佈或衝擊游離的產生機制等,間接影響元件特性或可靠度的退化行為,而Kirk效應在不同的電壓條件、漂移區的摻雜狀況或者是結構設計都會出現不一樣的影響結果。因此,研究高壓元件時常會觀察到許多獨特的特徵曲線及可靠度退化機制,這些現象常常迥然不同於傳統的電晶體理論模型。 本論文將闡述此高壓功率元件平台的設計重點及其優異成果的展示,同時也針對開發過程中所觀察到的非典型元件特性行為進行深入的探討。

關鍵字

高壓元件 可靠度

並列摘要


Abstract With the evolution of Moore’s law in CMOS technologies, the demands of high-voltage MOSFET transistors (HVMOS) are also rapidly increasing for the diversifications and functionalities in modern electronic product. For the reason, a 0.18μm BCD platform is developed for major consumer applications. This platform consists of modular processes with comprehensive device options in 5V to 70V ratings. To improve the conduction loss, 15~40% reduction of device on-resistance are achieved compared to state-of-art industrial IC-based competitors. Due to specific application requirements, various architectures as well as design techniques are introduced to construct the HVMOS in this BCD platform. It is known that the Kirk’s effect usually dominates the electric field distribution and impact-ionization generation. The influence is significant to device characteristics and the reliability degradations but varying with operation voltage, drift region profile, doping concentration and device architecture. Consequently, exceptional device characteristics and hot-carrier-injection (HCI) degradation behaviors are quite prevalent and distinct from the traditional understandings. In the dissertation, the design considerations and the achievements of the BCD platform are demonstrated. A few cases with respect to the atypical device characteristics while developing the BCD technology are comprehensively investigated as well.

並列關鍵字

High Voltage MOSFET LDMOSFET DEMOSFET Reliability

參考文獻


[1]IDF 2011 US Day 1 Keynote (Part 1), Paul Otellini
[2]“More-than-Moore” white paper by ITRS, 2010
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[9]R. K. Williams, K. Amberiadis, and D. Angst, ``Smart-Power Devices Seek Wiser CAE Tools,'' Circuits Devices, pp. 20-26, 1991.

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