矽鍺、矽/鍺超晶格與鍺通道應用於電荷捕捉式快閃記憶體與金氧半導體元件之電特性研究

Electrical Characteristics of Charge-trapping Flash Memory and MOS Devices with SiGe, Si/Ge Super-lattice and Ge Channels

劉禮榮(Li-Jung Liu)

指導教授 ： 張廖貴術

國立清華大學/原子科學院/工程與系統科學系/博士(2013年)

https://doi.org/10.6843/NTHU.2013.00462

摘要

隨著對非揮發性記憶體與金氧半電晶體元件需求的激增，具有高效能同時保有優良可靠度特性的元件是必要的。並且，為了達到高儲存密度與封裝密度，具有隨縮能力的元件也是必要的。因此，為了改善元件的操作特性與效能，矽鍺通道被視為是最有潛力的ㄧ種提升效能並可降低操作電壓的方式，並且可同時維持元件的微縮能力。在本文中也提供了有關矽鍺通道、高鍺濃度通道與鍺元件之介面層處理的相關文獻回顧。
在本論文中，矽鍺通道、矽鍺超晶格通道與純鍺通道都應用於提升快閃記憶體元件操作速度的研究上。並且，基於純鍺通道於快閃記憶體上的經驗，我們也對具有不同氧化鍺介面層製程之鍺金氧半元件與金氧半電晶體元件進行研究。
在使用了矽鍺通道後，快閃記憶體之寫入與抹除速度接獲得顯著的提升，並同時維持了與矽通道元件相同的可靠度特性。我們也同時觀察到，矽鍺通道對於寫入抹除速度的提升，會隨著通道中鍺濃度的增加而上升。因此，為了達到高鍺濃度的通道結構，我們提出了一種新穎的矽/鍺堆疊之超晶格結構。從材料分析的結果我們觀察到，剛堆疊完成之矽/鍺超晶格通道具有極低的表面粗糙度與絕佳的晶格排列，有利於元件的製作。在使用了矽/鍺超晶格之後，快閃記憶體之元件操作速度得到了大幅的提升，並且其特性比使用矽鍺通道之元件更好。同時，使用了矽/鍺超晶格之快閃記憶體元件，可維持與矽通道元件相同的可靠度特性。對於使用了鍺基板之快閃記憶體，與矽通道元件相比，鍺元件具有極快的操作速度，並且可維持甚至提升記憶體之電荷保存能力。然而，鍺快閃記憶體之耐久性較矽通道記憶體元件來的差一些。
基於製作鍺快閃記憶體元件之經驗，我們也對具有不同氧化鍺介面層製程之鍺金氧半與鍺金氧半電晶體元件進行研究。製作高效能之鍺金氧半與鍺金氧半電晶體元件的關件在於高品質具有化學組成比的超薄氧化鍺介面層。在本研究中，具有低等效氧化層厚度與可接受之閘極漏電流密度之鍺金氧半元件，可利用水氣電漿成長之氧化鍺介面層，搭配同步成長之氮氧化鉿閘極介電層來達成。並且，利用X光光譜儀與高解析度穿透式顯微鏡分析與觀察其水氣電漿成長之氧化鍺介面層，發現此氧化鍺介面層具有+4價氧化態，同時具有0.3 nm 超薄的物理厚度。這是本研究的重要成就。同時，具有高電洞遷移率之鍺金氧半電晶體元件，也可利用此以水氣電漿成長之氧化鍺介面層來達成。為了更進一步的提升氧化鍺介面層的品質，我們也針對不同水氣電漿製程中的成長參數對於鍺金氧半元件電特性的影響進行研究。最後，我們可利用水氣電漿來形成具有高度化學組成比與超薄厚度的氧化鍺介面層的鍺金氧半元件，此鍺金氧半元件具有極低的等效氧化層厚度與高度可靠度特性。

關鍵字

快閃記憶體 ； 金氧半導體 ； 鍺 ； 矽鍺 ； 超晶格

並列摘要

With the increasing demand on non-volatile memory and MOSFET devices, devices with high performance while maintaining good reliability properties are needed. Also, shrinkage in cell dimension for achieving higher storage and packing density is required. In order to improve the device performance, the utilization of SiGe buried channel is considered most promising for improving performance and lowering the operation voltage, according to the simulations, while stays on the track of device scaling down. Literature reviews on the growth of SiGe buried channel, high-concentration Ge channel and the growth techniques of interfacial layers on Ge substrate are provided.
In this dissertation, SiGe buried channel, Si/Ge super-lattice channel and Ge channel have been employed for the application on charge-trapping type flash memory devices. Furthermore, Ge MOS and MOSFET devices with different formation processes of GeO2 interfacial layer are also investigated.
With the employment of SiGe buried channel, both programming / erasing speeds of devices can be improved while maintaining the reliability characteristics as compared with Si-channel devices. Furthermore, the enhancement on device performance increases with the increasing Ge content within channel. Hence, in order to achieve high-Ge content channel structure, we proposed a novel Si/Ge super-lattice channel structure. From the material characterization of the as-deposited super-lattice, the super-lattice structure possesses extremely low surface-roughness and high crystal quality which are helpful for device fabrication. As a result, much better performances of devices with the employment of super-lattice channel are observed as compared to those with SiGe buried channel. At the meanwhile, the reliability properties for devices with employing super-lattice channel are kept which perform as well as Si-channel devices. For flash memory devices on Ge substrate, devices with different interfacial layers are investigated. The device performances are significantly improved by using Ge substrate as compared with Si-channel device and the retention characteristics can be kept simultaneously. However, the endurance property for Ge devices is slightly worse than that of Si-channel device.
Based on the above experience on fabricating Ge flash memory devices, Ge MOS and MOSFET devices with different formation processes of GeO2 interfacial layer are also investigated in this work. The key challenge of having high performance Ge MOS and MOSFET devices is the formation of high quality stoichiometric GeO2 interfacial layer with ultra-thin thickness. In this work, a low EOT with an acceptable gate leakage current density Ge MOS device can be achieved by using H2O plasma grown GeO2 interfacial layer together with in-situ grown HfON gate dielectric. Furthermore, the oxidation states and thickness of the H2O plasma grown GeO2 interfacial layer are characterized by XPS spectroscopy and HR-TEM, respectively, where the oxidation state is +4 with thickness of around 0.3 nm. It is an important achievement in this work. At the meantime, Ge p-MOSFET devices with high hole mobility are obtained by using the high quality GeO2 interfacial layer grown by H2O plasma process. Furthermore, the effects of various detailed growth-conditions within the H2O plasma process on electrical characteristics of Ge MOS devices are also investigated. A high composition of stoichiometric GeO2 interfacial layer with ultra-thin thickness are achieved which result in ultra-low EOT and high reliability properties of the Ge MOS devices.

並列關鍵字

Flash memory ； MOSFET ； Germanium ； SiGe ； super-lattice

參考文獻

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