低電壓暨低電容暫態電壓抑制器之研究

隨著半導體技術進步，金氧半積體電路操作電壓由以往的5V，3.3V降至2.5V，在90 nm製程技術之後，操作電壓已經降至1.2V。在現今的積體電路技術中，這些精密的電晶體變的對於靜電放電以及暫態電壓越來越敏感。因此，用於靜電放電以及暫態電壓防護用的保護元件的額定工作電壓也應隨之降低，以提供適當的保護。用於防護靜電放電以及暫態電壓的保護元件，依照其保護的對象，可粗分為兩類：電源供應線以及資料傳輸線。對於電源供應線的保護元件，主要的需求在於適當的崩潰電壓以及低漏電流。然而，在降低崩潰電壓時常伴隨著漏電電流的上升。另一方面，資料傳輸線上之保護元件的則需要低電容，以避免影響到資料傳輸線上的資料傳輸速度以及資料正確性。在本論文中分為兩部分：第一部分是對現有的暫態電壓保護元件的改良，抑制在降低崩潰電壓時伴隨而生的漏電流。就現有元件的漏電抑制部分，利用全面性的反態離子佈殖降低元件週邊摻雜濃度，此種方法可以降低元件週邊的電場達到降低因能帶穿隧效應引起的漏電流。此種方法可以利用極少的製程變化達到改善產品性能的效果。在低電容方面，由於具有單一接面的二極體元件其崩潰電壓以及接面電容的關係受到物理上的限制。新的元件採用具有電場增強效果的結構降低崩潰電壓，突破崩潰電壓以及接面電容的物理限制。另一種方法則是利用串連兩個二極體所組成的元件，以降低電容值。此外，由於傳統上用於保護元件的二極體，其順偏操作下可承受的電流高於逆偏操作，並利用非對稱性的結構更進一步的改善低電容靜電防護以及暫態電壓保護元件的低電容特性。

關鍵字

低電壓；低電容；暫態電壓抑制器

並列摘要

As complementary metal-oxide semiconductor (CMOS) technology progresses, the supply voltage drops from 5V and 3.3V to 2.5 V or even lower than.1.2 V for CMOS technology beyond the 90 nm technology node. The delicate transistors in modern integrated circuits (ICs) are becoming more sensitive to transient voltage stress or electrostatic discharge. Hence, the rating voltage of the corresponding protection device should be reduced to accommodate these changes. For power line protection, the leakage caused by band-to-band tunneling in low-voltage transient voltage suppressor (TVS) devices would be a major problem. For data line protection, one key feature is to maintain low capacitance of these TVS devices to prevent interference with the protected circuits. In this dissertation, there are two targets: the improvement on leakage for commercially available low-voltage TVS devices and the design of new TVS structure to effectively reduce the overall capacitance. A simple method of blanket-ion implantation is used to reduce leakage in low-voltage TVS. By adapting electric field enhancement structure, the breakdown voltage can be reduced and the relationship between the breakdown voltage and junction capacitance on conventional TVS diodes can be broken. A device with two junctions in series is another way to reduce the capacitance. Based on the current capability difference between forward and reverse biased diodes, an asymmetry structure is also used to further reduce the overall capacitance and increase the current handling capability of the two-junction device.

並列關鍵字

Low Voltage ； Low Capacitance ； Transient Voltage Suppressor ； TVS ； Electrical Overstress ； Electrostatic Discharge

參考文獻

Chapter 1

[1.2] Ya-chin King, Bin Yu, Jeff Pohlman, and Chenming Hu, “Punchthrough Diode as the Transient Voltage Suppressor for Low-Voltage Electronics”, IEEE Trans. on Electron Devices, Vol. 43, No. 11, pp. 2037-2040, 1996

[1.3] Vasile V.N. Obreja, “Capabilities and Limitations of Semiconductor Surge Voltage Suppressor,” Proc. International Semiconductor Conference (CAS'99), pp. 169-172

[1.4] B. Jayant Baliga, Power Semiconductor Devices, Boston, MA: PWS, 1996. pp.82

[1.6] E. O. Kane, “Zener Tunneling in Semiconductors,” J. Phys. Chem. Solids, Vol. 12, pp. 181-188, 1959

國際替代計量

低電壓暨低電容暫態電壓抑制器之研究

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