利用超取樣介面之溫度感測器積體電路設計與實現

Design and Implementation of Temperature Sensor IC with Oversampled Interface

許哲維(Jer-Wei Hsu)

指導教授 ： 鍾文耀

中原大學/工學院/電子工程研究所/碩士(2004年)

https://doi.org/10.6840/cycu200400755

摘要

本論文主要目的是將CMOS 溫度感測器與超取樣類比/數位介面電路整合於相同之晶片上，並產生八位元之數位輸出。溫度感測元件主要是利用雙載子電晶體之基-射極電壓，當雙載子電晶體偏壓在接近PTAT電流時，基-射極電壓會隨溫度而呈線性之變化，因此是非常好的溫度感測元件。雙載子電晶體在CMOS製程之實現方式為利用垂直基底等效之PNP電晶體來實現。

超取樣類比/數位介面電路架構為一階連續時間調變器，其原理主要就是對輸入訊號作超取樣、並利用回授的方式將量化器之雜訊頻譜修整至高頻，最後再利用計數器降頻取樣並把高頻雜訊濾除掉，產生八位元之數位輸出訊號。所設計之電路經由台灣積體電路製造公司(TSMC)之0.35μm 2P4M製程來實現，整個溫度感測器包含pad面積為1400×1400 μm2，溫度從-10 oC至60 oC量測結果顯示感測器轉換時間為2.56 ms、解析度為0.29 oC、精準度誤差則為0 ~ -3.28 oC。經由一點校正後，感測器精準度誤差可以降低至±1.64 oC以內。

為了實現一個不受溫度與至製程變異影響之能帶隙參考電壓，我們利用截波技術來降低放大器之偏移電壓與低頻雜訊，經由晶片量測結果可以證實得到一個非常穩固、不受製程變異影響的參考電壓，其值在常溫下為1.206V，溫度係數最差可從146.2 ppm/℃改善至56.9 ppm/℃，相對誤差也從0.53 % 改善至0.25 %。

關鍵字

溫度感測器 ； 超取樣介面電路 ； 截波偏移消除技術

並列摘要

The aim of this thesis is to integrate both CMOS Temperature Sensor and Oversampled analog/digital interface circuit on the same chip, and produce digital output with eight-bits resolution. The architecture of oversampled analog/digital interface is a first order continuous-time ΔΣ converter, which is based on oversampling, feedback and filtering of the quantization error. In order to verify the Oversampled analog/digital interface circuit, a PTAT sensor is developed with CMOS parasitic substrate PNP transistor. Furthermore, with a bandgap reference circuit as a example, so-called chopper technique is employed to reduce the offset and lower-frequency noise of the operational amplifier. The temperature- sensing signal is converted by ΔΣ modulator into one-bit digital signal with higher frequency and then down-sampled by eight-bit counter. All the circuits are implemented in TSMC 0.35μm 2P4M process.
For 3V supply voltage, the conversion time of converter is 2.56ms, the resolution and accuracy error of temperature sensor is 0.29 oC and 0 ~ -3.28 oC in the temperature range from –10 oC to 60 oC. The accuracy error can reduce to within ±1.64 oC with one-point calibration at 15 oC. Besides, the measured results show that the choppered bandgap is very stable against process variation. The output voltage is 1.206V at 25 oC. The temperature factor with and without chopper technique is 146.2ppm/ oC and 56.9ppm/ oC, respectively. And hence get an improvement of relative error from 0.53 % to 0.25 % in the worst case.

並列關鍵字

Oversampled ΔΣ converter ； Chopper Technique ； Temperature Sensor

參考文獻

[10] 游明義, “適用於CMOS製程之溫度感測器設計與應用”, 中原大學碩士論文, July 2003.

[1] Sze, S. M., “Semiconductor Sensors,” John Wiley & Sons, NY, U.S.A., p.104,1994.

[6] Gert Van der Horn, Johan L. Huijsing, Integrated Smart Sensor: Design and Calibration, Kluwer Academic Publishers, 1998.

[7] P. Malcovati, C. Azeredo Leme, P. O’Leary, F. Maloberti and H. Baltes, “Smart Sensor Interface with A/D conversion and Programmable Calibration”, IEEE J. Solid-State Circuits, 29, pp. 963-966, 1994.

[9] A. Bakker, “CMOS Smart Temperature Sensor - An Overview”, Proc. IEEE Sensor, vol. 2, pp. 1423-1427, 2002.