應用於離子感測器之CMOS溫度感測積體電路設計

The Integrated Circuit Design of CMOS Temperature Transducer for ISFET Application

邱嘉生(Chia-Sheng Chiu)

指導教授 ： 鍾文耀

中原大學/工學院/電子工程研究所/碩士(2009年)

https://doi.org/10.6840/cycu200900076

摘要

本論文主要目的是設計一個適用於CMOS製程之溫度感測器，可應用於離子感測器上，近幾年來因離子感測場效電晶體(ISFET)具有體積小、檢驗快速及簡易操作且具有與CMOS製程相容之優點，所以離子感測場效電晶體其相關感測器在醫學或環境感測上所扮演的角色日趨重要，但是由於離子感測場效電晶體受溫度的影響相當的大，因此必須額外的加入溫度感測以及校正機制於系統當中。
本論文中之溫度感測器是利用兩個操作在不同電流密度之雙載子電晶體之基極-射極電壓差(ΔVBE)對溫度之特性來實現，此電壓差對溫度呈現正溫度係數，其值大約為200uV/℃，此種溫度感測器又稱為PTAT(Proportional to Absolute Temperature)溫度感測器，此種架構之溫度感測器的反應電壓相當小，因此對於雜訊處理相對重要，對於CMOS製程來說，以MOS為輸入對之放大器本身的偏移電壓(offset)以及雜訊都較大，在輸入到後級類比數位轉換器的時候會被雜訊以及偏移電壓破壞，所以我們使用截波技術來降低前級放大器的偏移電壓以及低頻雜訊。
在後級之類比數位轉換器是採用積分三角類比數位轉換器(Delta-sigma ADC) ，其優點是採用超取樣之架構並且利用雜訊移頻的方式，將雜訊移往高頻，之後再利用數位濾波器將高頻的雜訊濾掉，其對於類比元件匹配的要求較為寬鬆，又可以達到高解析度的效果，所以在近年來廣泛的被使用，本論文之電路經測試在類比數位轉換器方面可達到16位元之解析度，溫度測試上從-10℃~60℃可到達 0.8℃之準確度，整個晶片佈局面積為1608umx1091um，所使用之製程為0.5um CMOS 2P2M製程。

關鍵字

溫度感測器 ； 積分三角類比轉換器

並列摘要

The purpose of the thesis is to design a CMOS temperature sensor for applications of ISFET sensors. In recent years, the ISFET structure has become more important in medical and environmental measurement applications because it has many advantages such as: small size, high-speed response, easy to operate and having the compatible fabrication technology as CMOS devices. However, ISFET performance affected by the temperature greatly, so additional temperature sensing compensation and correction function have to be added to the system.
In this study, the temperature sensing is implemented by using the voltage difference (ΔVBE) vs. temperature characteristic between two bipolar junction transistors operate at unequal current densities. As the structure of PTAT temperature sensor, the ΔVBE exhibits a positive temperature coefficient of 200 μ V/℃.Because the signal of PTAT temperature sensor is very small, it will be influenced by the low-frequency noise and offset generated by the operational amplifier with MOS input transistor in CMOS fabrication technology. The solution is reducing the low-frequency noise and offset of pre-amplifier by using chopper stabilized technique.
The analog-to-digital converter is Delta-Sigma ADC. It has features of over-sampling structure and shifts the noise to high-frequency by noise-shaping technique, and then can be attenuated by using digital filter. It is been widely used lately, since it has good tolerance for matching with analog devices and can achieve higher resolution. The chip of this thesis achieves a resolution of 16-bit and temperature accuracy of 0.8℃ within the range of -10℃~60℃. This chip layout area is 1608μm x 1091μm; the fabrication technology is 0.5μm CMOS 2P2M technology.

並列關鍵字

Delta-Sigma ADC ； Temperature sensor

參考文獻

[15] 許哲維, “利用超取樣介面之溫度感測器積體電路設計與實現”, 中原大學碩士論文, July 2004.

[1] 劉康義, “離子感測場校電晶體巨集行為模型開發與感測陣列訊號處理電路設計”, 中原大學碩士論文, July 2004.

[3] A. Bakker,J Huijsing, “High-accuracy CMOS Smart Temperature Sensors”, Kluwer Academic Pulishers,2000.

[4] B. Razavi, “Design of Analog CMOS Integrated Circuits”, McGraw-Hill, 2001.

[5] B. Razavi, “Principle of Data Conversion System Design” ,IEEE Press Marketing,1995.