以PECVD成長微晶矽薄膜電晶體

The Structure of Hydrogenated Microcrystalline Silicon (μc-Si:H) TFTs Deposited by PECVD

簡耀黌(Yao-Hong Chien)

指導教授 ： 溫武義

中原大學/工學院/電子工程研究所/碩士(2007年)

https://doi.org/10.6840/cycu200700054

摘要

本實驗中，我們利用了電漿輔助化學氣相沉積法(PECVD, Plasma-Enhanced Chemical Vapor Deposition)，並在SiH4/H2流量比為0.5%、電漿功率(RF Power)為1500W、反應室壓力(Pressure) 650Pa以及Carrier gas(Ar)為3000sccm等的成膜條件下，可沉積出μc-Si:H之膜質。我們將μc-Si:H薄膜表面型態，經由掃描式電子顯微鏡(SEM, Scanning Electron Microscope)以及原子力顯微鏡(AFM, Atomic Force Microscope)觀察，其晶粒尺寸約為20-30nm，經高解析度穿透式電子顯微鏡(HRTEM, High Resolution Transmission Electron Microscope)觀察其斷面晶格結構，可發現為倒錐狀之結構，再進一步以拉曼光譜儀(Ram Spectra)進行鍵結強度，在鍵結強度部份我們可以得之，其鍵結強度和p-Si(複晶矽, Poly silicon)接近，約在571cm-1左右。

當進行TFT元件特性量測時，其Ion(Id開電流)、Ioff(Id關電流)、Vth (門檻電壓)及μ(電子遷移率)都比a-Si:H TFT來得差，在閘極偏壓耐久性測試、光漏流及變溫度測試下，顯示出與a-Si:H TFT偏移趨勢相同，主要的原因為測試Sample TFT元件結構採用Bottom Gate，由於μc-Si:H材料底部為懸鍵(Dangling Bond)最多的a-Si區，因此元件通道若是在μc-Si:H的底部，則其電性特性一定會比一般的a-Si:H來得差。因此若要得到最佳的元件特性，TFT結構需採Top Gate之結構，讓通道產生在μc-Si:H材料的頂層。

關鍵字

微晶矽薄膜電晶體 ； 電漿輔助化學氣相沉積法

並列摘要

The hydrogenated microcrystalline silicon (μc-Si:H) TFTs are prepared by plasma-enhanced chemical vapor deposition(PECVD) with the controlling factors of these experiments including 0.5% SiH4/H2 gas flow rate, 1,500W RF power, 650Pa pressure, and 3000sccm Ar carrier gas, respectively. The surface morphology of μc-Si:H thin film after secco etching is observed by SEM(Scanning Electron Microscope) and AFM(Atomic Force Microscope), and grain size is about 20-30nm. The high resolution transmission electron microscopy (HRTEM) image of the cross section of μc-Si:H TFTs deposited on glass substrate. It is shown the clearly difference of the inverted taper structure between the microcrystalline silicon and buffer layer interfaces. Raman spectra is shown that under different deposition environment, there is less for the μc-Si:H layer deposited by PECVD than poly-Si although the intensity ratio of the peak(~517cm-1) shows clear variation.
The behavior of the threshold voltage and field-effect mobility of μc-Si:H TFTs under the bias gate stress, light illuminated and thermal stress experiments indicates unobvious difference to the a-Si:H TFTs. The crystallized distribution proved that the transistor channel was the amorphous state including most dangling bonds. To adopt the top-gate structure μc-Si:H TFTs to test, we will get better transistor properties.

並列關鍵字

PECVD ； Microcrystalline silicon TFTs

參考文獻

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