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  • 學位論文

於NetFPGA-10G實現高速網路流量量測系統

An Implementation and Study of High-Speed Traffic Measurement System on NetFPGA-10G

指導教授 : 賴裕昆
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摘要


本論文探討多種基於速寫演算法的流量計數方式,以實際的核心網路流量來模擬測試並比較其效能。將兩種演算法CM-Sketch(Count Min Sketch)與MPC(Multiple Probabilistic Counting),以硬體描述語言(Verilog HDL)實現在NetFPGA-10G開發平台,並且完成具有網路資料分流(Network Traffic Tap)功能之高速網路流量量測系統。此系統,在觀測時間之內,可以量測流經觀測點所有不同種類封包流的個數(Distinct Flow Count),以及每一個流量中的封包出現次數。

並列摘要


Network traffic flow measurement and analysis are the essential part of the network intrusion detection system design. In this dissertation, we study selected sketch-based algorithms which are capable of estimating the cardinality and multiplicities of traffic flow in high-speed core networks. We explore these algorithms with real-world network traffic traces and implement two of them in NetFGPA 10G platform. The traffic measurement prototype is capable of acting as a network tap to identify the number of distinct IP flows and the number of times a packet belongs to a particular IP flow. We also provide register interfaces for the host to retrieve these measurement results for high level application design.

參考文獻


[3] P. Lieven and B. Scheuermann. High-speed per- ow tra c measurement with proba-bilistic multiplicity counting. In INFOCOM, 2010 Proceedings IEEE, page 1-9, 2010.
[5] Y. Liu, W. Chen, and Y. Guan. A fast sketch for aggregate queries over high-speed network traffc. In INFOCOM, 2012 Proceedings IEEE, page 2741-2745, 2012.
[10] D. Barman, P. Satapathy, and G. Ciardo. Detecting attacks in routers using sketches.In High Performance Switching and Routing, 2007. HPSR'07. Workshop on, page 1-6,2007.
[12] K. Y Whang, B. T Vander-Zanden, and H. M Taylor. A linear-time probabilistic counting algorithm for database applications. ACM Transactions on Database Sys-tems, 15(2):208-229, 1990.
[13] P. Flajolet and G. Nigel Martin. Probabilistic counting algorithms for data base applications. Journal of Computer and System Sciences, 31(2):182-209, 1985.

被引用紀錄


廖怡俊(2013)。基於NetFPGA10G架構中適用速寫演算法之控制器設計與實現〔碩士論文,中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201301003

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