本論文將對FlexRay的通訊控制器傳送資料的靜態區部份做規劃分析,FlexRay會因每一個節點所需傳輸要求不同,可有不同之規劃,適當的規劃節點傳輸安排,有助於整個網路通訊傳輸能力之提升。本論文中,將討論FlexRay通訊週期中的靜態區參數規劃,我們將提出靜態區重新規劃及排程的改善方法,利用靜態區使用率和資料傳送時所用時間,藉以說明改善之程度,最後再將此靜態區資料排程改善法設計成Matlab GUI圖形操作介面,使規劃參數變得更加方便。另外,本論文將車載網路通訊協定FlexRay中的通訊控制器使用硬體描述語言來實現,並利用Modelsim來模擬驗證其功能;然後用FPGA燒入設計的通訊控制器和主控器,透過邏輯分析儀測量FlexRay所發送的訊號是否符合FlexRay規範要求;再加上市售的匯流排驅動器晶片(TJA1080),把燒入FPGA中的通訊控制器和匯流排驅動器結合,藉此完成一個完整數位及類比電路結合之FlexRay節點,測量示波器檢測通道上的訊號是否符合通道傳遞模式,藉以完成節點之互通驗證工作;最後使用德國TZM公司所開發的FlexRay實驗板與我們開發的雛型系統來做互通測試。透過這些硬體系統驗證測試,確定所設計的通訊控制器的功能是能夠正確的運作。
In this thesis, we study the data schedule of communication cycle in the FlexRay. Each node will have the different transmission requirement. Suitable schedule on the static segment of FlexRay system can upgrade the capability of transmission network. We will study and set the static segment parameters of FlexRay communication cycle that can improve the transmission capability on the steady schedule. Using the utilization of static segment and the transmission time, we show the improvement of the utilization and transmission time. We build the improvement methodology of the FlexRay static segment by using Matlab GUI which makes the setting schedule parameters more convenient. Moreover, we design and build the FlexRay communication controller by the hardware description language (HDL). We use the Modelsim to simulate the functions. And we combine the HDL of the desing communication controller and the NIOS II host into FPGA, to verify the signal data by the logic analyzer. And we add the bus driver chip of the physical layer (TJA1080) to FPGA, to measure the analog signal by the FlexRay oscilloscope. We show the intercommunication of two FlexRay nodes with our implementation of the communication controllers. Finally, we use TZM development board to deliver the FlexRay frames with our design FlexRay FPGA node. The filed try communication of development board will show our implemented FlexRay communication controller with normal and successful operations.