在通信系統、資料庫系統、中值濾波器及影像處理中,都會有需要做資料大小的排序,這些資料的大小的排序通常利用中央處理單元再加上記憶體之控制,資料量愈大,處理的時間也愈長,為了讓中央處理單元處理有效率的執行其他比較重要之工作,及減少對記憶體之管理,可以考慮用特定排序硬體電路完成此項動作,這促使我們做排序方法的研究。本論文將探討硬體排序電路的基底模組設計,及若多筆比較資料時,如何設計排序硬體電路,組合與複製其基底模組電路,讓排序硬體電路的應用靈活度更高且使電路設計簡單化。 本論文提出一個以4筆輸入資料的排序硬體電路,並將此電路模組單元化,當作一個基底排序模組單元,藉由數個基底排序單元的擴充連接,可組合成多種輸入數目不同的排序電路,此種擴充重複使用硬體電路的方式便可將此基底排序單元稱為「可重複使用之擴充排序基底模組」,此排序電路可以應用於FlexRay通訊系統或是其他應用中。
In a communication system, database system, median filter, and image processing, we need to sort the data list. We sort the data on the computer system by software programs, which control the central processing unit and manage the memory. It will waste larger time to sort the greater amount of data. In order to allow the central processing unit to perform other more efficient jobs and reduce to manage the memory, we can design a specific hardware circuit to sort data. This thesis will study the sorting base hardware circuit which is reusable and expansionary. We will provide the higher flexible and simpler methods to design the sorting hardware circuit when the multiple input data are sorted. Our study proposes the sorting circuit of four inputs as a cell-based hardware module. Combining several cell-based sorting modules and connecting, a different input data sorting hardware circuit will be performed. We call this expansion reusable cell-based module as “sorting module cell with reuse and expansion.” This sorting circuit design can be applied to FlexRay communication system of other applications.