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  • 學位論文

錫-鎳-矽三元系統相平衡與錫-(銅)/鎳-矽界面反應

Phase Equilibria of the Sn-Ni-Si Ternary System and Sn-(Cu)/Ni-Si Interfacial Reactions

指導教授 : 陳志吉

摘要


覆晶構裝是目前積極發展的電子構裝技術,覆晶構裝製程之銲錫凸塊下金屬層中,以擴散阻障層最為重要。擴散阻障層之沉積多半使用磁控濺鍍之製程,但目前最常用之擴散阻障層材料鎳具有磁性,會干擾濺鍍製程,降低沉積速率。於鎳中添加少量矽可以消除磁性,進而加快沉積速率。本論文探討Sn/Ni-4.5wt%Si及Sn-0.7wt%Cu/Ni-4.5wt%Si之界面反應,以評估Ni-Si合金作為新的擴散阻障層材料之可行性。此外,本論文也探討Sn-Ni-Si三元系統於250℃下之相平衡,以提供材料組成選擇之參考。   本論文以實驗方式決定出Sn-Ni-Si三元系統於250℃下之相平衡,共決定出10個三相區、21個兩相區以及12個單相區,其中並無觀察到三元相。FCC_A1 Ni、Ni3Sn、Ni3Sn2相之最大Si溶解度分別為12.8、6.1與4.6at%,其餘介金屬相幾乎沒有第三元溶解度。   Sn與Sn-0.7wt%Cu銲料與Ni-4.5wt.%Si基材之界面反應大致與純Ni相似,矽對界面反應沒有明顯影響,生成相分別為Ni3Sn4相與Cu6Sn5相,其中幾乎沒有矽溶解度。210℃之時效測試與250℃之迴銲反應之結果顯示,Ni-4.5wt%Si基材與純Sn及Sn-0.7wt%Cu銲料之界面反應生成相之生長速率較純Ni基材時緩慢。既然添加4.5wt%Si可以消除Ni的磁性,與銲料之反應速率又比純Ni慢,Ni-4.5wt%Si合金是具有潛力應用於覆晶構裝之新的擴散阻障層材料。

並列摘要


Flip chip packaging is the most important electronic packaging technology nowadays. Of all the under bump metallurgy layers, the diffusion barrier layer is the most critical. This thesis investigates the interfacial reactions between the lead-free solders and the Ni-Si alloy as the reference of the reliability assessments of lead-free solders/Ni-Si soldering joints. Ni is the commonly used diffusion barrier layer material, and the Si addition is to eliminate the ferromagnetism of Ni. The phase equilibria of the Sn-Ni-Si ternary system at 250℃ are determined experimentally as well. In Sn-Ni-Si ternary system at 250℃, no ternary phase is found. 10 three-phase, 21 two-phase, and 12 single-phase regions are determined. The maximum Si solubility in the FCC_A1 Ni, Ni3Sn, and Ni3Sn2 phase are 12.8, 6.1, and 4.6at%, respectively. The ternary solubilities of the other phases are negligible. Sn/Ni-4.5wt%Si and Sn-0.7wt%Cu/Ni-4.5wt%Si interfacial reactions are similar to those of Sn/Ni and Sn-0.7wt%Cu/Ni. The reaction phases are also the Ni3Sn4 and Cu6Sn5 phases, respectively. Si does not have significant effects upon the interfacial reactions. However, the Ni-4.5wt%Si alloy exhibits slower reaction rate with the pure Sn and Sn-0.7wt%Cu solders than the pure Ni. Since the 4.5wt%Si addition does not alter the interfacial reactions, and the Ni-4.5wt%Si alloy has the slower reaction rate than the pure Ni, the Ni-4.5wt%Si alloy is the potential new diffusion barrier layer material in flip chip packaging.

參考文獻


41.陳岳廷、陳志吉,錫-銻-鎳三元系統相平衡與錫-銻-(鎳)/鎳界面反應,中原大學化學工程學系碩士論文 (2011)。
5.C. C. Chen, and S. W. Chen, Journal of Electronic Materials, Vol. 35, No. 9, pp. 1701-1707 (2006).
6.S. W. Chen, and C. C. Chen, Journal of Electronic Materials, Vol. 36, No. 9, pp. 1121-1128 (2007).
7.M. Li, F. Zhang, W. T. Chen, K. Zeng, K. N. Tu, H. Balkan and P. Elenius, Journal of Materials Research, Vol. 17, No. 7, pp. 1612-1621 (2002).
9.溫從凱、陳榮盛,利用G/L方法探討WLCSP構裝含UBM錫球之疲勞壽命,國立成功大學工程科學系碩士論文 (2005)。

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