在溫度變化影響下晶元電性測試的技術
分析以提升良率之研究

半導體業在面對環境溫度變化時，除了設計端元件的溫度特性曲線會有變化之外，其測試配件與架機設定的測試環境因素也是影響良率的主要因素之一，而本技術報告正是透過銲墊上針痕的觀測，來提供並指出此關鍵因素的研究。一般而言，在確認半導體元件或積體電路的結構及功能，以保證晶圓產品在系統層次的完整性與功能正常時，基本上還是以測試規格為標準，來對所有半導體產品實施全面的檢測。其目的在於汰除未能符合規格之不良品，以避免流至客戶端，並針對不同客戶之需求，依據測試結果將產品做進一步等級分類。半導體產品的測試，是利用探針將積體電路的輸入、輸出、電壓供給、接地等端點接到電腦測試機，進行功能、漏電流、電流驅動能力等測試。在先進製程裡的測試流程，則會導入高低溫操作，來做為測試規格的重點。當晶圓在高低溫度環境變化下做測試，經常要面臨的問題是良率不佳，而其成因往往是接觸不良所致。這是因為當環境溫度變化，測試配件會發生變形，藉由觀測此形變，可找出各種造成良率降低的因素，並比較這些因素對良率造成的影響。其中針對某些因素設定，例如溫控、機台配件、探針壓力等，提供更好的解決方案，以改善環境溫度對晶圓良率的影響，則是本技術報告的重心。

關鍵字

銲墊刮痕，探針卡，針測流程，探針預熱

並列摘要

Under a thermal shock, not only is the characteristic curve of the semiconductor device sensitive to the temperature variations, but the setting of the wafer probing test accessories and the machine itself also has an impact onto the surrounding temperature, which would result in a low yield rate of the semiconductor fabrications. In this technical report, we will study the key factor “ a wafer probing test” via observations and measurements of the pad scratches located at the setting of the wafer probing machine under the circumstance of temperature variations. In general, verifications of the structure and functionalities for semiconductor devices or integrated circuits (IC) guarantee the integrity of the wafer products in the system level, conducted basically a comprehensive testing procedure to all IC products according to the corresponding test specifications. The purpose of verifications lies in not only eliminating the defective products through the failure of the testing specification for meeting the expected criterion of each product, but also classifying each product through various qualities for fulfilling the needs of different potential customers. As a result, those fail to pass the standard criterion can be avoided flowing to the client, while those successful to pass the verifications can be distributed in different classes for the rating evaluation. In fact, the evaluations of the semiconductor device are via the utilization of the probe cad where the input, output, voltage supply, grounding, and other endpoints of the integrated circuits are connected to the computer test machine, for testing their functionalities, leakage currents, current drive capabilities, and so on. Furthermore, in an advanced IC fabricated process, the introduction of a thermal shock, operating at high and low temperatures, to the testing evaluations has played an important role for verifying the specifications. Under the evaluations of a thermal shock, the problem we have to face lies in a poor yield rate, which often results from a poor contact. This is because the test accessories have occurred deformations when a huge variation of the temperature is operated. However, those deformations of the test accessories are given an evidence of a low yield rate. In other words, through careful examinations for the deformations of the fittings, several main factors, such as the temperature control, various accessories, and probing pressures, can be discussed and compared with one another to provide a better solution for enhancing the overall yield rate of the wafer, which is the main issue of this technical report.