以FPGA執行即時去交錯影像處理

本研究之目的在於設計能即時處理影像訊號，並達到高品質影像輸出，研究中採用適應性移動補償解交錯演算法，處理交錯式掃描影像訊號，即時輸出高解析度的循序式掃描影像訊號於液晶顯示器。　　系統中所採用之解交錯演算法的效果，影響了輸出影像之品質，演算法的繁簡影響了晶片的面積與耗能，本篇論文中，採用適應性移動補償解交錯演算法，利用Verilog 硬體描述語言，寫為暫存器傳輸層次(register transfer level, RTL)，再將程式燒錄至DE2上的FPGA(Field Programmable Gate Array)，以驗證理論之可行性；若使用軟體操作，勢必無法達到即時處理的需求，因為只處理研究中所使用之演算法的亮度訊號Y，即需中央處理器運算週期5GHz以上，因此以硬體FPGA加速影像的處理。如此，也不需將佈局圖(Layout)送晶片做成實際的IC，才能完成驗證的步驟。本研究所設計的系統，以移動偵測、空間域差補、時間域差補、中值濾波四部分為主，於NTSC制式下，增加每秒輸出為60張畫面，輸出影像與Matlab所模擬之另五種常用演算法比較後，而本研究成果之MSE值最低與PSNR值最高；再取圖場複製、掃描線複製演算法與本研究所提出之適應性移動補償解交錯演算法於DE2上實現硬體比較，其中適應性移動補償解交錯演算法之輸出成果無任何殘影與毛邊現象，與其他演算法相較顯示已達較高品質輸出影像。

關鍵字

FPGA ；解交錯；即時處理

並列摘要

The purpose of this research was to design real-time image signal processing to achieving high quality image output. The research adopts adaptive motion compensated de-interlacing algorithm to process interlaced scanning image signal , real-time output progressive scanning image signal of high dpi in LCD monitor. The use of the de-interlacing algorithm adopted in the system, affects the quality of the output image. The complexity and simplcity of the algorithm affected the area and the attrition energy of the chip. This paper adopts adaptive motion compensated de-interlacing algorithm. Using of verilog HDL, to write for the register transfer level, and then burn to DE2 program on the FPGA(Field Programmable Gate Array) that to verify the feasibility of the theory, If use the software operation, it will certainly not be achieved the needs of real-time process. As the research deals only with the use of algorithms in the brightness signal Y.It needs CPU of operation cycle above 5 GHz. So use of hardware FPGA accelerated image processing. Therefore, also do not to send the chip layout making the actual IC, to complete the verification steps. The system designed in the research ,mainly based on four parts: motion detection, spatial-interpolation, temporal-interpolation, median filter. Under the NTSC format, increase in output per second for 60 screen. Output images and Matlab simulation of the other five commonly used algorithms comparison. The results of the MSE value of the minimum and maximum value PSNR. Show that the research has reached to high-quality images output.

並列關鍵字

de-interlace ； FPGA ； real-time processing

參考文獻

[2] Shyh-Feng Lin,Yu-Lin Chang,and Liang-Gee Chen, “Motion adaptive de-interlancing by horizontal motion detection and enhanced ELA processing,”IEEE International Symposium on Circuits and System,Vol.2,May 2003.

[3] G. De Haan ,and R. Lodder ,“De-interlacing of video data using motion vectors and edge information,”Proc. of IEEE Int’l conf. on Consumer Electronic,pp70-75,June 2002.

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[5] E.W.Engstrom, “A study of Television Image Characteristic-Part Two:Determination of Frame Frequency for Television in terms of Flicker Characteristice,”in Proceeding of the I.R.E.,Vol.23,pp.295-310,1935.

Intelligent Edge-Based Line Average with Its Implementation and Test Method,”IEEE International Symposium on Circuits and Systems,Vol.2,May 2004.

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以FPGA執行即時去交錯影像處理

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