心電訊號擷取系統之前端積體化讀取電路設計與實現

Design and Implementation of Front-End Readout Chip for Electrocardiac Signal Acquisition Systems

游上億(Shang-Yi You)

指導教授 ： 鍾文耀

中原大學/工學院/電子工程研究所/碩士(2009年)

https://doi.org/10.6840/cycu200900283

摘要

未來生活的醫療行為將以主動的方式掌握個人的健康狀態，許多隨身式的生理監護器材，如血糖儀、血壓儀、心電圖機、體溫計等已漸漸融入一般人的生活之中，未來的醫療將朝向多功能積體化系統整合之目標，並結合社區醫院與資訊服務平台來達到遠距醫療保健之願景。
本研究係針對心電圖機前端的擷取電路進行積體化電路的開發與設計，研究中先以改良式的定值轉導補償方式來提高放大器共模拒斥比之特性，以符合一般使用分離式元件來實現讀取電路所需之規格，在積體化讀取電路開發上，採用全差動式的架構來降低外在的雜訊干擾，在儀表放大器上使用電流式元件來組成差動輸出架構，並使用截波穩定器技術來消除放大器本身的直流偏移，在低通濾波器設計上，採用全差動式四階切換式電容組態，文中還使用與溫度成正比之電流源的補償方式來實現高穩定低頻振盪器以提供系統所需的時脈訊號，在監控系統驗證上使用LabViewb程式與FPGA發展板來實現心電訊號的分析與顯示。
在積體電路實現上，使用TSMC 0.35um 2P4M 製程進行模擬與下線製作，擷取電路晶片面積約1.21mm2，操作電壓為±1.65V，時脈訊號為10KHz，低通頻率為51Hz，導通帶增益為50~70dB，靜態消耗功率約375uW。

關鍵字

電流式儀表放大器 ； 截波穩定器 ； 低頻振盪器 ； 心率變異度 ； 電流傳輸器 ； 心電訊號 ； 定值轉導 ； 切換式電容濾波器

並列摘要

The future medical treatment will use active method to monitor personal health. Nowadays, many kinds of portable health-care instruments, which like blood-glucose, blood-pressure and heart-rate monitors or clinical thermometer, are popular used in human life. The future medicine will connect community hospitals, information service and personalize multi-function monitor device to reach home-care target.
This research is focus on electrocardiac signal integrated readout circuit design. In the beginning, there proposes an improving constant Gm compensation circuitry to conform with high common-mode rejection ratio characteristic of readout circuit which is implemented by discrete components. For integrated readout circuit design, the fully differential structure is used to resist the nature noise and the differential output instrumentation amplifier composed of current conveyors with chopping stabilize technique is in order to cancel self dc offset. The lowpass filter is designed by forth-order fully differential switched-capacitor configuration. In addition, this work also propose a high stable, low frequency oscillator, that is using IPTAT current to compensate the temperature and process effect, to provide the clock signal for readout circuitry. Finally, the monitor system is verified by LabView platform and FPGA developed board to analyze and display ECG signal.
The integrated readout circuit is simulated and implemented by using TSMC 0.35um 2P4M process with 1.21mm2 chip size. The readout chip is operated in ±1.65V supply voltage and 10KHz clock frequency. The circuitry lowpass cutoff frequency is design at 51Hz and with 50~70dB gain in passband. The steady state power consumption is around 375uW.

並列關鍵字

current conveyor ； constant-gm ； SC filter ； current-mode IA ； chopping stabilize ； HRV ； low frequency oscillator. ； ECG

參考文獻

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