本論文建立一通用的感測器網路系統,此系統可分為網路連接與感測器之通訊介面;網路各節點所採用網路通訊介面為常見的I2C通訊介面,各節點連接之感測器都能自動連接上不同之串列通訊介面,如I2C、UART、SPI等。我們以這種硬體架構可整合各種不同感測器與控制器,對每個網路節點都能各自偵測感測資料及互通有無,達到資料分享及運用,使得網路系統能更精準分析與決策,希望可以應用在農業、工業、汽車業等,使得這些產業的自動化與智慧化更容易實現。 網路節點的實現以Verilog硬體描述語言進行,最後以FPGA IC硬體進行實現;實現可以自動偵測感測串列通訊介面,可與各種感測器進行智慧化自動判斷與連接,進行感測值資料之接收及控制,並連接市面上的感測器模組連接測試是否能正常傳輸運作,此硬體可加快通訊介面之判斷與執行。過程中並規劃各串列通訊之流程,進行資料之傳收訊框之設計;本硬體設計並考量在邏輯分析儀和示波器等工具擷取傳輸訊號時,發現由電路板與高頻訊號所造成之雜訊失真和彈跳現象,對此現象進行數位IC設計之改善。
In this dissertation, we establish a common sensor network system. In this architecture system, we adopt the I2C communication interface between the network nodes. And there are several different sensors on each network node. Each node can automatically detect and connect to these sensors by I2C, UART, and SPI interfaces. In this network system, we can integrate a variety of sensors and controllers on a system network node. We can share and collect the sensor data to make decision or control. The network system can be used in agriculture, industry, and automotive industry. The node implementation of the network connection and sensor connection make data sharing easily and smart. The network nodes are implemented by the FPGA and are designed by the Verilog code. The network nodes can automatically detect and connect the serial communication interfaces of the sensors. The nodes can read the data from the connecting sensors and configure the register maps in these sensors. The sensing data can be normally transmitted between the network nodes. The hardware implementation of nodes can work fast and judge accurately. In the implementation, we also consider the process implementation for the transmit frame format of the serial communications. In our study, we also consider the glitch, distortion, and bouncing problems generating from the high-frequency signal and the circuit board. We use the RTL design to solve them.