應用於低頻帶超寬頻系統使用三階諧波抑制技術之壓控環形振盪器

Design of the CMOS Voltage-Controlled Ring Oscillator with Third Harmonic Cancellation for Low-Band Ultra-Wide Band Systems

張瑋婕(Wei-Chieh Chang)

指導教授 ： 陳淳杰

中原大學/工學院/電子工程研究所/碩士(2007年)

https://doi.org/10.6840/cycu200700524

摘要

本論文提出一個使用三階諧波相消(3rd-order harmonic cancellation)技術的壓控環形振盪器(Voltage-Controlled Ring Oscillator，VCO)，應用於低頻帶(3 ~ 5GHz)超寬頻(Ultra-Wideband，UWB)系統。此壓控振盪器由一組三級的差動式環形振盪器及一加法器所組成，使用加法器將環形振盪器的兩個相位差60度之輸出訊號相加，能有效的使振盪器輸出訊號之三階諧波抑制比低於-40dBc，以產生更加純淨的輸出訊號，使其在輸入至90度相位產生電路(Polyphase Filter)時，其輸出的相位誤差得以大幅下降。模擬結果顯示其在電源電壓為1.8V、控制電壓變化範圍為0V~1.8V的條件下，頻率可調範圍為3924MHz ~ 4534MHz，中心頻率設定在4224MHz，其輸出功率為-10.44dBm，增益(Kvco)為339MHz/V，三階諧波抑制比為-43dBc，相位雜訊為 -101 dBc/Hz @ 5MHz offset，總消耗功率11.93 ~ 13.12 mW，晶片面積為0.725*0.385mm。

關鍵字

相位誤差 ； 三階諧波抑制 ； 頻率合成器 ； 壓控環形振盪器

並列摘要

This thesis presents a Voltage-Controlled Ring Oscillator (VCO) with third-order harmonic cancellation technique for low-band Ultra-Wideband (UWB) system. The VCO consists of three-stage delay cells and an adder load. Use the adder to add the two output signals that have phase delay 60 degrees from ring-oscillator. Then that can effective to make oscillator output signal third harmonic suppress ratio lower than -40dBc. In order to produce the more pure output signal and make it while inputting to Polyphase Filter it is phase error exported can drop by a wide margin .
The simulation result shows the operating frequency range from 3924MHz to 4534MHz, center frequency at 4224MHz, and tuning range is 0V ~ 1.8V. The output power is -10.44dBm, the gain of vco(Kvco) is 339MHz/V. The simulated third harmonic rejection is - 43dBc at 4224MHz, phase noise is - 101 dBc/Hz @ 5MHz offset. The power consumption is 11.93 ~ 13.12 mW at 1.8V supply voltage in a 0.18um standard RF CMOS process.

並列關鍵字

Voltage-Controlled Ring Oscillator ； Phase Error ； Frequency Synthetizer ； Third Harmonic Cancellation

參考文獻

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