諧振腔調變低相位雜訊壓控震盪器之設計與分析

Design and Analysis of Low Phase Noise Voltage Controlled Oscillator with Harmonic Tuned LC Tank

洪晧鈞(Hao-Chun Hung)

指導教授 ： 陳淳杰

中原大學/電機資訊學院/電子工程研究所/碩士(2016年)

https://doi.org/10.6840/cycu201600746

摘要

本論文的研究目的在於設計低功率、低相位雜訊的CMOS壓控振盪器，主要運用諧振腔調變技術，設計一倍頻開路及二倍頻諧振波短路後，使零交越點斜率變大，讓方均根電壓變大，能進而改進相位雜訊。
模擬結果主要使用HSpice及SpectreRF進行模擬，使用TSMC所提供的1P6M，0.18um的CMOS製程。供應電壓為1.8V，消耗電流為5mA，相位雜訊在1MHz處在調變前為-118.1 (dBc/Hz)，調變後為-121.8 (dBc/Hz)。

關鍵字

壓控振盪器 ； 電感電容共振腔 ； 諧振波調變 ； 低相位雜訊

並列摘要

This paper proposes a design of low phase noise and low power consumption for CMOS voltage controlled oscillators. The harmonic tuned LC tank, which used open-circuit at fundamental frequency and short-circuit at the second harmonic. The results in output square waveforms with bigger root-mean-square voltage and reduced the phase noise.
Result of simulation used Hspice and SpetreRF. Using TSMC 0.18-um 1P6M CMOS process. The power supply is 1.8V and power comsumption is 5mA. The phase noise is -118.1 dBc/Hz at 1MHz, and the harmonic tuned VCO has phase noise -121.8 dBc/Hz at 1MHz.

並列關鍵字

Voltage Controlled Oscillator ； Harmonic Tuned LC tank ； low phase noise ； LC tank

參考文獻

[1] 陳志炘,“Design and Analysis of Dual-Band LC Voltage Controlled Oscillator”, 中原大學電子工程學系碩士學位論文,2012.

[2] T. H. Lee, and A Hajimiri, “Oscillator Phase Noise：A Tutorial,”

IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 326-336, March 2000.

[3] D. B. Leeson, "A Simple Model of Feedback Oscillator Noise

[4] A. Hajimiri and T. H. Lee, "A general theory of phase noise in electrical oscillators," IEEE Journal of Solid-State Circuits, vol. 33, no. 2, pp. 179-194, Feb. 1998.