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  • 學位論文

基於側窗濾波器之即時影像暗通道除霧積體電路設計

VLSI Design of Real-Time Dark Channel Dehaze Based on Side Window Filter

指導教授 : 陳世綸

摘要


本論文提出以積體電路設計為導向之基於側窗濾波器的即時影像暗通道演算法,並實現側窗濾波器的積體電路設計。科技迅速發展下,在各項領域中,多以鏡頭作為感測器,配合深度學習以進行各類型的辨識項目。其中,除霧的演算法在眾多研究者的努力下,在演算法層面產生出許多優秀的除霧結果。然而,大部分的除霧演算法主要針對軟體層面進行運算,在較複雜的運算下,對於保持良好的除霧效果是不太友善的。因此,為了兼顧影像品質與實時運算需求,本研究以此為設計目標,提出除霧演算法包含四大部分:暗通道值計算、大氣光值計算、透射率以及影像還原。為使除霧效果提升並解決原始暗通道計算所造成的光暈問題,使用側窗濾波器來改良暗通道計算方式,使細節部分保留下來。透過簡化大氣光值運算以降低複雜度並提升整體運行速度。與現有最新技術相比,本論文所提出的除霧演算法除了複雜度較低外,且除霧效果擁有較好的影像還原品質。 硬體方面,本研究使用簡易的邊緣檢測,來減少側窗濾波器所需要的大量暫存器和乘法器。此外,使用線緩衝記憶體暫存待處理像素,使側窗濾波器部份以及最後的影像還原部分不致遺失所需資料。本研究所提出之硬體設計主要以管線化架構進行電路加速,使設計在維持除霧品質同時兼具即時性。本論文提出之除霧積體電路架構在FPGA Xilinx Zynq7020實現,使用了1072個logic cell,操作頻率達到200MHz,其功率消耗為7.2mw。相較於現有的除霧電路設計,本論文提出得積體電路架構擁有較低的硬體成本及優良的除霧效果。

並列摘要


This thesis proposes an integrated circuit design-oriented real-time image dark channel algorithm based on the side-window filter and realizes the VLSI design of the Side-Window filter. Nowadays, lenses are used as sensors in various fields, and deep learning is used to carry out various types of identification projects. Among them, the dehazing algorithm has produced many excellent dehazing results at the algorithm level with the efforts of many researchers. However, most of the defogging algorithms are performed at the software level. Under complex calculations, it is difficult to maintain a good dehazing effect while taking into account the real-time requirements of the image. Therefore, with the design goal of low complexity and high quality, the proposed dehazing algorithm includes four parts: dark channel value calculation, atmospheric light value calculation, transmittance and image restoration. In order to improve the defogging effect and solve the halo problem caused by the original dark channel calculation, the side window filter is used to improve the dark channel calculation method, so that the details are preserved. By simplifying the calculation of atmospheric light value, the complexity is reduced and the overall operation speed is improved. Compared with previous researches, the dehazing algorithm proposed in this paper has lower computational complexity, and the dehazing effect has better image restoration quality than other researches. In terms of hardware, this study uses simple edge detection to reduce the large number of registers and multipliers required by the side window filter. In addition, the line buffer is used to temporarily store the pixels to be processed, so that the Side-Window Filter part and the final image restoration part will not lose the required data. The overall design is processed in parallel with the pipeline architecture, which makes the design real-time while maintaining the dehazing quality. Furthermore, the dehazing integrated circuit architecture proposed in this paper is implemented in FPGA Xilinx Zynq7020, using 1072 logic cells, the operating frequency reaches 200MHz, and its power consumption is 7.2mw. Compared with the current circuit design, the integrated circuit architecture proposed in this paper has lower hardware cost and excellent dehazing effect.

並列關鍵字

Dehaze VLSI Side-window Filter FPGA

參考文獻


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