降低複雜度之下鏈路LTE系統之實現與量測

Implementation and Measurement of the Reduced Complexity FDD-LTE Downlink System

張正岳(Cheng-Yueh Chang)

指導教授 ： 鍾日龍

中原大學/電機資訊學院/通訊工程碩士學位學程/碩士(2014年)

https://doi.org/10.6840/cycu201400197

摘要

本論文採用軟硬體相互驗證的方式來實現降低複雜度之下鏈路LTE(Downlink)在分頻雙工(Frequency Division Duplexing, FDD)模式下之系統。我們使用System Generator○R套件搭配Simulink○R來快速雛形化此系統。首先，吾人撰寫各個模塊對應之MATLAB○R程式做為主要模塊設計的參考，接著，我們利用System Generator○R進行各個模塊及系統的設計。
在傳送端，吾人設計能產生PSS訊號及SSS訊號的電路，並產生控制訊號電路以使訊號擺入正確的位置。在接收端，吾人實現封包偵測模組及小數載波頻率偏移估測及補償模組，達到時間及頻率的同步。在降低複雜度方面，我們推導出有效降低位元數的公式，並把該公式的概念結合到我們設計的電路及程式。接著，吾人將此LTE系統的傳送端及接收端透過合成工具ISE轉化為可合成的bitstream檔並將此檔案下載至WARP軟體無線電開發板，並利用ChipScope量測完成電路驗證。

關鍵字

複雜度 ； 軟體無線電

並列摘要

In this thesis, we use software-hardware co-simulation to implement the Downlink LTE in Frequency Division Duplexing system with reduced complexity. We use Simulink○R and System Generator○R to quickly implement the prototype of this system. First, I program MATLAB codes of each module as a design reference, and then we use the System Generator to design individual modules of the systems.
In the transmission end, we primary synchronization signal(PSS), and secondary synchronization signal(SSS) circuits, and implement a control signal circuit so that the designed signals can put into the correct positions. In the receiver end, we complete the packet detection module and fractional carrier frequency offset estimation and compensation module for timing and frequency. As for reducing hardware complexity, we derive a formula of reducing the number of bits, and we use synchronization the concept of the formula into our circuit design and program. Next, we synthesize bitstream file with the ISE tool and download the file into the WARP SDR platform. Finally, we use ChipScope to verify the designed circuit.

並列關鍵字

PDSCH ； OFDM ； software-hardware ； Xilinx ； System Generator ； LTE

參考文獻

[1]3GPP TS 36.101 V8.4.0 (2008-12) Evolved Universal Terrestrial Radio Access

[2]3GPP TS 36.213 V10.3.0 (2011-09) Evolved Universal Terrestrial Radio Access (E-UTRA);Physical layer procedures(Release 10).

[5]3GPP TS 36.211 V10.3.0 (2011-09) Evolved Universal Terrestrial Radio Access (E-UTRA);Physical Channels and Modulation (Release 10).

[6]Magnus Sandell, Jan-Jaap van de Beek and Per Ola Borjesson, “ML Estimation of Time and Frequency Offset in OFDM Systems,” IEEE Transactions on Signal Processing, Vol. 45, No. 7, July, 1997.

[12]Guohui Wang, Bei Yin, Kiarash Amiri, Yang Sun, Michael Wu, Joseph R. Cavallaro, “FPGA prototyping of a high data rate LTE uplink baseband receiver,” Rice University, Nov, 2009.