透過您的圖書館登入
IP:3.149.229.253
  • 學位論文

鰭式場效電晶體堆疊單層二硫化鉬 之三維互補式場效電晶體的製作與電性特性分析

Fabrication and Electrical Properties Analysis of Three-Dimensional Complementary Field-Effect Transistor with Fin Field-Effect Transistor Stacked Single Layer Molybdenum Disulfide

指導教授 : 鐘元良

摘要


在本次實驗中,我們先通過國家奈米元件實驗室提供的半導體製程設備和矽鰭式場效電晶體製備技術先將底層的P型矽鰭式場效電晶體製作出來。 將完成的鰭式場效電晶體覆蓋上氧化層並使用化學機械研磨使表面平整。通過蝕刻技術將連接下層下層元件的洞打開並填入金屬完成堆疊結構的底層製備。 接下來透過使用轉置工藝搭配氫氧化鉀水溶液將長在藍寶石基板上的單層二硫化鉬轉移到矽鰭式場效電晶體的上層,再通過現有的半導體技術將N型半導體的單層二硫化鉬和P型矽鰭式場效電晶體製作成互補式金屬氧化物半導體(Complementary Metal-Oxide-Semiconductor, CMOS)。 最後我們通過量測CMOS反相器的電壓傳輸訊號,看到CMOS反相器的電壓傳輸曲顯示信號反轉,表明我們成功將二硫化鉬和矽鰭式場效電晶體結合在一起並表示其製造工藝能與現有的矽半導體技術兼容。這項結果可以增加未來二維材料的實際應用性。

關鍵字

鰭式電晶體 二硫化鉬 三維

並列摘要


In this experiment, we first made the underlying P-type Fin-type field effect transistor through the semiconductor process equipment provided by the National Nano Device Laboratories and the silicon Fin-field effect transistor preparation technology. The completed Fin-field effect transistor is covered with an oxide layer and the surface is flattened using chemical mechanical polishing. The bottom layer of the lower layer component is opened by an etching technique and filled with a metal to complete the under layer preparation of the stacked structure. Next, a single layer of molybdenum disulfide grown on the sapphire substrate is transferred to the upper layer of the silicon Fin-field effect transistor by using a transferring process with an aqueous solution of potassium hydroxide, and the N-type semiconductor single layer MoS2 and P-type silicon Fin-field effect transistor are fabricated into complementary metal oxide semiconductors by existing semiconductor technology. Finally, we measured the voltage transmission signal of the CMOS inverter and saw that the voltage transmission of the CMOS inverter showed a signal reversal, indicating that we successfully combined molybdenum disulfide and silicon Fin-field effect transistors and expressed the process is compatible with existing silicon semiconductor technologies. This result can increase the practical applicability of future 2D materials.

並列關鍵字

FinFET MoS2 Three-Dimensional

參考文獻


Uncategorized References
1. Streetman, B.G. and S. Banerjee, Solid state electronic devices. 2016.
2. Bhattacharya, D. and N.K. Jha, FinFETs: From Devices to Architectures. Advances in Electronics, 2014. 2014: p. 21.
3. Wang, Z., Novel CMOS inverter with linearly adjustable threshold voltage using only three MOS transistors. Microelectronics Journal, 1991. 22(5): p. 75-79.
4. Novoselov, K.S., et al., Room-Temperature Quantum Hall Effect in Graphene. Science, 2007. 315(5817): p. 1379.

延伸閱讀