應用於DC-DC降壓轉換器之高解析度以時間加法器為基礎的數位脈波寬度調變器

直流降壓轉換器廣泛使用於各式電子電路中。當設計一個數位直流降壓轉換器時，數位脈波寬度調變器則是其中一個關鍵的組成元件。本論文提出一個以時間加法器為基礎的數位脈波寬度調變器，相較於文獻上絕大多數現有技術的數位脈波寬度調變器其同時兼具有高解析度、低硬體成本與容易實現於FPGA或ASIC等特徵。新型以時間加法器為基礎的數位脈波寬度調變技術實現於Altera DE0 實驗板並整合應用於直流降壓轉換器。實驗量測結果顯示，當輸入電壓範圍在1.8伏特~3.3伏特時，其輸出電壓範圍在0.6伏特~2.5伏特與最大額定負載電流為1安培。當操作於輸入電壓為3.3伏特與輸出電壓為1.8伏特的條件下，暫態響應時間與下沖電壓分別為254微秒與160毫伏特於輕載轉態為重載；暫態響應時間與上沖電壓分別為266微秒與140毫伏特於重載轉態為輕載。此外，在任何操作條件下，輸出漣波電壓不高於100毫伏特與效能高達90.9%。

關鍵字

現場可規劃邏輯閘陣列；直流-直流降壓轉換器；時間加法器；數位脈波寬度調變器

並列摘要

The buck DC-DC Converter is widely used in various electronic devices. When designing a digital buck DC-DC converter, the digital pulsewidth modulator (DPWM) is definitely one of the key building blocks of the entire buck converter. A time-adder-based DPWM is proposed in this thesis. The proposed DPWM features high-resolution, low hardware cost and easy-to-implement in either a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC) as compared to most state-of-the-art DPWMs. The technology of proposed time-adder-based pulsewidth modulation is implemented on Altera DE0 FPGA board and is also integrated for a buck DC-DC converter application. The experimental results show that the regulated output voltage ranges from 0.6V to 2.5V and the maximum load current is 1A, when the supply voltage of proposed buck converter ranges from 1.8V to 3.3V. While the regulated output voltage is set to 1.8V with a 3.3V supply voltage, the transient response time and the undershoot voltage are respectively 254μs and 160mV under a light-to-heavy loading condition, i.e. the load current changes from 100mA to 1A; The transient response time and the overshoot voltage are respectively 266μs and 140mV under a heavy-to-light loading condition. Meanwhile, the output ripple is less than 100mV and the efficiency is up tp 90.9% under all operating conditions.