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  • 學位論文

應用於DC-DC降壓轉換器之以計數器為基礎的數位脈波寬度調變器

Counter-Based Digital Pulsewidth Modulator For DC-DC Buck Converter

指導教授 : 林佑昇

摘要


在現今,直流對直流降壓轉換器廣泛的應用在各種電子電路中,而我設計的直流降壓轉換器,是使用數位的控制方式,並且使用數位脈波寬度調變器,來調變電壓。 而本論文採用的是以計數器為基礎的脈波寬度調變器,具有高解析度及較低的硬體成本。 本論文的數位式直流降壓轉換器,是由降壓轉換器的基本架構以及數位脈波寬度調變器所組成的。數位脈波寬度調變器實現於FPGA開發版,並且與直流降壓轉換器的PCB板做整合及量測。然後將數位脈波寬度調變器以台積電180nm的製程並且使用Cell-Based Design flow的設計方式去做下線晶片的動作,最後再與直流降壓轉換器的PCB板做整合及量測。最後實驗量測結果顯示,我可將輸入電壓1.8伏特~3.3伏特降到0.8伏特~2.5伏特。當操作於輸入電壓為3.3伏特與輸出電壓為1.8伏特的條件下,我的輸出漣波電壓為80毫伏特以及轉換效率為89.5%。

並列摘要


In today's DC-DC buck converter is widely used in a variety of electronic circuits, and I designed the DC buck converter is the use of digital control, and the use of digital pulse width modulator to modulate the voltage. This paper presents a counter-based digital pulse width modulator with high resolution and low hardware costs. The digital DC buck converter in this thesis is composed of the basic structure of the buck converter and digital pulse width modulator. I implemented the digital pulse width modulator in the FPGA development board and integrated it with the PCB of the DC buck converter. Then the digital pulse width modulator to TSMC 180nm process and the use of Cell-Based Design flow design approach to tape-out. Finally, with the PCB of the DC buck converter integration and measurement. The final experimental measurements show that I can drop the input voltage from 1.8V~ 3V to 0.8V~ 2.5V. When operating at 3.3V input voltage and 1.8V output voltage, output ripple voltage is no higher than 100 millivolts and the conversion efficiency can reach 89.5%.

參考文獻


References
[1]LDO regulator, Retrieved June 2011, from
http://www.circuitstoday.com/ldo-regulator
[2]顏智鴻。2015。High Efficiency Synchronous CMOS Switching Buck Regulator with Current Limit and Frequency Divider Mode Technique。碩士論文。國立中央大學電機系研究所。
[3]梁適安 交換式電源供給器之理論與實務設計,全華出版社, 2008

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