應用於K-Band & V-Band之功率放大器

本論文以高增益與高功率之功率放大器為主要的研究目標。我們設計與實現了兩顆不同頻帶的功率放大器。研究主軸可分成兩部分：第一個部分：我們利用了0.18μm CMOS的製程設計並且實現一顆應用於K-Band的高增益之功率放大器。在電路架構方面，我以基本的三級疊接架構來實現，疊接的目的可用來消除米勒效應對電路帶來的影響，也可以改善反向隔離度。以達到高增益之目的。量測結果顯示此電路操作在22~26GHz時，增益(S21) 為23dB，飽和輸出功率(Psat)為13.75dBm，最大功率附加效率(PAE)為13.98%，而電路整體消耗之功率為131.5mW。依照量測結果可以得知此電路有著不錯的特性並且適合應用於K頻帶的發射機系統。第二部分：是一個使用了TN90RF的製程實現於應用在V-Band的功率放大器，電路架構分為三級，第一級為基本的疊接架構，第二級為基本的共源級(CS)架構來實現，主要是因為疊接架構能得到較好的增益以及改善反隔離度，線性度與功率消耗都差於共源級的架構，因此，為了取得數據上的平衡，才會第一級使用疊接的架構第二級使用共源級的架構。而最後一級我們則是使用了功率等分(Power splitting/combining)的架構來實現，主要的目的是為了能夠達成高輸出增益與高功率的功率放大器，模擬結果增益(S21) 為11.742± 1.49dB，飽和輸出功率(Psat)為11.37dBm，最大功率附加效率(PAE)為15.81%，而電路整體消耗之功率為44.4mW。本電路在整體消耗功率上有突出的表現。此電路非常適合整合於V頻帶的發射機系統中。

關鍵字

功率放大器； PAE ； K頻段； V頻段；疊接；共源級； Wilkinson功率分配器；發射機

並列摘要

The purpose of thesis is to research high gain and high efficiency power amplifier. We design and realize two power amplifiers, which apply for different frequency. The thesis can be divided into two parts： The first part is on design and realize of the high gain power amplifier for K-band applications in 0.18μm CMOS technology. In this circuit, We used the cascade-stage structure three stage to eliminate to Miller effect and improve reverse isolation. In order to achieve high gain. The measured results show that this circuit operating 21GHz~24GHz, the gain (S21) is 23 dB, saturation output power is 13.75dBm, max power added efficiency (Peak PAE) is 13.98dBm, total power consumption is 131.98 mw, these results indicate that this circuit performs well for K-band transmitter systems. The second part is on the design V-band power amplifier in TN90RF process, The circuit could divided into three stages. The first stage is using cascade-stage, which have better power gain and improve the isolation. But linearity and power consumption are worse than common source stage. Therefore, the second stage is using common source topology. The circuit final stage is using power splitting/combining. In order to achieve the high power gain and high power added efficiency. The circuit simulation results for operating 57GHz~64GHz. Gain(S21) = 12.52±1.3dB saturation output power (Psat) is 9.762dBm, max power added efficiency is 8.5dBm, total power consumption is 62.4mW and chip area is 0.8332x0.7354 mm2,This power amplifier is performs well for V-Band transmitter systems.