具錯誤偵測與混淆能力之有限場多項式基底乘法器設計

Design of Polynomial Basis Multiplier over GF(2m) with Error Detection and Confusion Capabilities

吳嘉仁(Chia-Jen Wu)

指導教授 ： 邱綺文

健行科技大學/電資學院/電腦通訊與系統工程研究所/碩士(2009年)

https://doi.org/10.6824/UCH.2009.00059

摘要

近年來通訊系統(Communication systems)、編碼理論(Coding theory)與密碼系統(Cryptosystems)皆廣泛地使用有限場(Galois field)乘法器，在橢圓曲線密碼系統(Elliptic Curve Cryptosystem)中所使用的計算核心為有限場運算。針對抵抗植入錯誤式密碼破解法(Fault Based Cryptanalysis)在密碼系統乘法器中所造成的破壞，本文在此對心臟型乘法器提出兩種錯誤偵測的架構，分別是位元移位重複運算法(RESO)與同位元預測法(Parity prediction)，其具有較節省電路成本之即時錯誤偵測能力(Concurrent Error Detection)和運算速度較快的特性，為了使駭客在破解密碼系統時相對提高其困難程度，因此增加混淆能力之電路，當錯誤偵測電路偵測出錯誤發生時，將遭受破壞的輸出結果與亂數產生器所產生的亂數做相加，讓駭客在進行破解密碼系統時增加其所耗費的時間，亦即提昇密碼系統安全性。

關鍵字

有限場乘法 ； 錯誤偵測 ； 密碼學

並列摘要

The communication system, coding theory, and modern cryptosystems employ the Galois field multiplier widely. Especially, Galois field multiplier is the most important part for computing elliptic curve cryptosystem. Recently, the new developed fault-based cryptanalysis would attack both symmetrical and asymmetrical cryptosystems effectively. Therefore, this paper proposes two methods, termed RESO and parity prediction methods, for fighting against such new cryptanalysis. The concurrent error detection polynomial basis GF(2m) multiplier has advantage of low hardware cost. When the multiplier with error detection capability detects the fault, it would add the random number of shift register to its output for confusing hackers. This architecture will promote the multiplier robust. Moreover, the hacker will spend more huge time to decrypt the message.

並列關鍵字

Galois field multiplier ； error detection ； cryptography

參考文獻

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