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  • 學位論文

脈波頻率調變降壓轉換器之演算法設計與電路實現

Algorithm Design and Circuit Implementation of Buck Converter with Pulse Frequency Modulation

指導教授 : 陳厚銘
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摘要


本論文分析脈波頻率調變降壓轉換器之輸出漣波電壓變化,並將結果以Matlab建立輸出漣波電壓演算法。演算法目的是供設計者在初始設計參數下,迅速得知輸出漣波電壓以及輸出電壓之正確性,同時藉由修正各項設計參數,以達到設計者預期之輸出漣波電壓和輸出電壓,藉此縮短設計時間,其中設計參數考量了,輸入電壓(Vin)、輸出電壓(Vout)、負載電流(Iload)、電感(L)、電容(C)、峰值電感電流(Ipeak)、遲滯電壓(VHYS)、回授電阻(P)比與控制電路延遲時間(tdelay)。本文使用台積電0.35μm 2P4M 3.3V/5V CMOS製程實現脈波頻率調變降壓轉換器,以驗證所提出的輸出漣波電壓演算法正確性,最後Hspice模擬結果與演算法相比,輸出漣波電壓誤差率範圍在2.46%~4.46%之間,輸出平均電壓誤差率為0.03%,由此可證明所提出輸出漣波電壓演算法具有高的準確度。此外所設計的降壓轉換器能將輸入電壓5V降至1V的輸出電壓,操作負載電流範圍為1mA~50mA之間,輸出漣波電壓均小於21.79mV,最高轉換效率在負載電流為50mA下效率為92.23%,線調節率為0.29mV/V,負載調節率為0.19mV/mA。

並列摘要


This thesis proposes an accurate output ripple voltage algorithm by analyzing output voltage variations in the PFM buck converter. The equation of output ripple voltage is carefully established by the complete parameters that contains Vin, Vout, Iload, L, C, Ipeak, VHYS, tdelay and ratio of feedback resistors (P). Therefore, this innovative algorithm can help designer to fast decide circuit parameters and to effectively reduce design time. The proposed buck converter is designed with a standard TSMC 0.35μm 2P4M CMOS technology. The proposed buck converter can regulate a 5V supply voltage to 1V under 1-50mA loads. The maximum power-conversion efficiency is 92.23% at 50mA load current. The load regulation and line regulation are 0.19mV/mA and 0.29mV/V, respectively. Moreover, the simulation results show that the error rates of output ripple voltage and average output voltage are smaller than 4.46% and 0.03%, respectively.

參考文獻


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