- 學位論文
使用金屬平衡演算法來降低時鐘樹架構受製程變數的影響
On Tolerating Process Variation with Metal Balance in Clock Tree Construction
並列摘要
With advanced manufacturing technology, it is getting difficult to have zero or almost zero-skew clock distribution, even the clock is synthesized to be zero-skew from conventional algorithms. In thiswork, we proposed a practical problem in clock construction with process variation awareness, which is to achieve the balance of the wirelength in preferred direction metal routing. Experimental results show that our approach (unbuffered and buffered clock tree syntheses) performs better than conventional DME algorithms in reducing the skew of the clock.
參考文獻
[1] T.-H. Chao, Y.-C. Hsu, and J.-M. Ho, "Zero Skew Clock Net Routing," in
Construction by Simultaneous Routing, Wire Sizing and Bu
Proc. IEEE/ACM Design Automation Conference, pp. 518-523, 1992.
[2] I-Min Liu, T.-Li Chou Adnan Aziz, and D.F. wong, "Zero-skew Clock Tree
延伸閱讀
- 陳文翰（2013）。考量多種製程之低功率時鐘閘樹建構演算法〔碩士論文，中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201300710
- 黃偉倫（2010）。考慮多電壓之零時序差異時鐘樹合成方法〔碩士論文，中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201000735
- Hsiao, H. C. (2008). 考慮多重操作模式與環境參數下利用線性規劃演算法之時鐘樹時脈偏移最佳化 [master's thesis, National Tsing Hua University]. Airiti Library. https://www.airitilibrary.com/Article/Detail?DocID=U0016-2002201314553173
- 陳劭恩（2013）。以元件庫特性為基礎之低功率時鐘樹合成方法〔碩士論文，中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu201300920
- 蘇進泓（2004）。An Effective Approach to Integrating Clock Tree Estimation into Floorplanning〔碩士論文，中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu200400433