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  • 學位論文

碲基導電橋式隨機存取記憶體之特性與可靠度研究

Properties and Reliability Investigation in Tellurium-Based Conductive Bridge Random Access Memory

指導教授 : 曾俊元
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摘要


在此篇論文中探討了以碲(Te)為離子源的導電橋式隨機存取記憶體之可靠度,並分成三個主題討論。第一部分,使用無氧元素的氮化矽做為轉態層,避免產生氧空缺的傳導絲,確立傳導絲由碲元素構成,另外,無氧元素的氮化矽層有效減低傳導絲的擴散,可增加資料保存的能力;此部分比較了使用碲及碲鈦化鎢作為上電極的記憶體元件特性。第二部分,為了降低形成電壓並增加轉態層的均勻性,使用相容於CMOS製程中做為高介電系數氧化物的氧化鉿,此層使用原子層沉積5奈米,因厚度減少故可降低形成(forming)電壓;此部分比較了使用鉭與鎢化鈦為阻障層的記憶體元件特性。第三部分,因為前兩部分的元件,在重複擦寫後的高阻態電阻值具有不穩定性,電阻開關比因而下降,所以此部分的元件轉態層為氧化鉿層上沉積氮氧化鉿層,在一定的轉態條件下,可以有效提升電阻開關比。各部分的詳細敘述如下。 第一部分中討論了在鈦化鎢/氮化矽/氮化鈦上使用碲及碲鈦化鎢為上電極之電阻轉換記憶體的轉態特性。因為束縛能的降低,使得以碲鈦化鎢為上電極的元件有較佳的雙元電阻轉換特性。此結果可由X射線光電子能譜分析中確認。碲鈦化鎢為上電極的元件,在形成(forming)過程後產生了類金屬的絲,且其擦除(reset)過程對應了熱熔解的機制。此處也建立了一個以碲絲為基礎的物理模型用來解釋轉態現象。以碲鈦化鎢為上電極的元件提供了優良的耐久性,可超過10^4的重複擦寫次數,且其開關比為500。另外,此元件在225°C下的保存時間可達10^4秒。此轉態特性的改善可歸因碲絲在形成過程與寫入(set)過程的強度增加,使其在高溫下較可免於擴散。 於第二部分討論了以氧化鉿為底且碲鈦化鎢為上電極的導電橋式隨機存取記憶體元件,而使用不同阻障層之特性影響。由X射線光電子能譜分析中發現,因為鈦化鎢阻障層的記憶體元件,其轉態層中的氧空缺少於使用鉭阻障層的元件,使得高溫下的碲絲在轉態層中擴散可被侷限,因此有較佳的高溫保存能力。碲鈦化鎢/鈦化鎢/氧化鉿/氮化鈦的記憶體元件有超過10^4的重複擦寫次數,其開關比為200,並且在200°C下的保存時間可達10^4秒。 最後的部分探討了雙層結構氮氧化鉿/氧化鉿的記憶體元件,此結構用於降低讀取電流的變異性並且增大了記憶窗。碲鈦化鎢/鉭/氮氧化鉿/氧化鉿/氮化鈦的記憶體元件可超過10^4的重複擦寫次數,且其開關比為5000。

並列摘要


The CBRAM devices with Tellurium as ion source are investigated in this thesis, which are categorized into three parts. In the first part, oxygen-free SiN is used as resistive layer, which prevents oxygen vacancies from being the composition of conductive filaments. Moreover, the self-diffusion of filament is limited in SiN layer, which increases the maximum working temperature in retention test. In addition, the characteristics of CBRAM with Te and TeTiW as top electrodes are compared. In the second part, high-k HfO2 as resistive layer, which is compatible with CMOS process, is used to decrease forming voltage and improve the film uniformity. Furthermore, the characteristics of CBRAM with Ta and TiW as barrier layers are compared. In the last part, because the on/off ratio of devices in the previous parts are lowered resulting from the unstable HRS resistance after several resistive switching cycles, the insertion of HfON layer effectively improves the on/off ratio under a specific switching condition. The detailed descriptions for each part are as following. In the first part, the switching properties of Te and TeTiW top electrodes (TEs) on TiW/SiN/TiN resistive switching memory devices are explored. The TeTiW TE device exhibits more favorable bipolar resistive switching behavior because of the decrease in binding energy after its use. This finding is confirmed through X-ray photoelectron spectroscopy analyses. The filament of the TeTiW TE device is metal like after forming, and the reset process corresponds with the thermal-dissolution mechanism. A physical model based on a Te filament is constructed to explain such phenomena. The TeTiW TE device provides the excellent endurance of more than 10^4 cycles, with an ON/OFF ratio of 500. The improvement can be attributed to the filament’s robustness during the forming and set processes, which prevent its diffusion even at high temperature. The device also features long retention for up to 10^4 s at 225 °C. For the second part, the impact of the barrier layer with TeTiW TE is discussed in the HfO2-based CBRAM devices. The considerable improvement of retention in the CBRAM device using TiW barrier layer is attributed to the lower amount of oxygen vacancies in the switching layer than Ta barrier, which is justified from the O1s core level in X-ray photoelectron spectroscopy analyses. Therefore, the diffusion of Te in the resistive layer of the device with the TiW barrier layer can be limited even at high temperature. The TeTiW/TiW/HfO2/TiN CBRAM device provides an excellent endurance of more than 10^4 cycles, with an ON/OFF ratio of 200. Such a device also features long retention for up to 10^4 s at 200 °C. In the last part, the memory device with dual-layer HfON/HfO2 is applied for reducing variation of read currents and enlarging the memory window. The TeTiW/Ta/HfON/HfO2/TiN device reaches 10^4 switching cycles with ON/OFF ratio of 5000.

並列關鍵字

RRAM CBRAM Te retention XPS

參考文獻


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