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  • 學位論文

側接觸之金屬/二維接面與氮化硼嵌入之單層二硫化鉬電晶體於次五奈米節點之研究

A Study of Metal-2D Junction with Edge-Contact and Hexagonal Boron Nitride (hBN) Inserted Single-Layer MoS2 Transistor for Sub-5nm Nodes

指導教授 : 簡昭欣
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摘要


矽基半導體產業在過去半世紀以來蓬勃發展,但電晶體微縮將面臨物理極限的瓶頸,因此我們開始找尋替代方案。由於二維材料得天獨厚的物理性質與原子級的厚度,被視為深具潛力的下世代元件候選人。全文旨在探討二維材料之一的二硫化鉬(MoS2),希望在次五奈米節點能大放異彩。論文中揭示了許多良好的材料性質與電性,例如埃級超高平坦度、極低的側接觸電阻率和單層二硫化鉬元件中優異的電性與轉換特徵曲線。 首先,從原子力顯微鏡(AFM)掃描中可得出二硫化鉬極低的埃級表面粗糙度。爾後我們應用正/逆傅立葉轉換於穿隧式電子顯微鏡(TEM)圖像上獲得層間距(約6.6 Å)。接著,從拉曼(Raman)檢測中可得到與材料層數相關的光譜訊號,對應到不同的訊號峰(A1g, E12g)位置差及不同強度比例。此外,光致發光譜(PL)中也表明單層二硫化鉬的能隙為1.87 eV;而對於多層者我們則採用掃描穿隧式顯微鏡(STM)來獲取能隙值,根據穿隧電流我們得到其為1.37 eV。最後我們使用X-射線與紫外光能譜儀(XPS/UPS)來量測金屬功函數並觀察金屬與二硫化鉬接觸的能帶準位,進一步得出鈀與二硫化鉬接面的價帶位障差值(VBO)為0.14 eV,以及鋁對單層二硫化鉬的導帶位障差異(CBO)為0.32eV。最後,我們利用費米積分來算出其載子濃度,單層與多層分別為3.4E18 cm-3(電子)以及6.2E19 cm-3(電洞)。 第二部分,我們採用傳輸線模型(TLM)來探討金半接觸電阻(ρC)與二為材料的片電阻(Rsh)。再者,鈀相比鈦(Ti)來說對於p-型的鈮(Nb)摻雜二硫化鉬有較小的接觸電阻及較高的穩定度。之後我們分別透過濕式蝕刻(BOE)和電漿乾式蝕刻來實作出垂直頂部接觸和邊緣側接觸的傳輸線模型,在利用穿透式顯微鏡來驗證實際上橫截面結構。經過電性量測萃取,得出側壁金半接觸電阻(4.5E-6Ω* cm2)比頂層接觸(3.8E-4Ω* cm2)低了兩個數量級以上,顯示出邊緣接觸的巨大優勢。另外,我們進一步使用MATLAB計算出層與層間的電阻率(ρint, 2.8E-4Ω* cm2)。 最後,我們經過多道製程技術並成功實作出單層二硫化鉬電晶體。並且透過光學顯微鏡(OM)、穿隧顯微鏡以及能量色散X-射線光譜(EDS)檢測,用來確保柵極(Gate)堆疊和源極(Source)/汲極(Drain)接觸構造的完整性。與鈦相比,利用鋁金屬作為源汲極金屬能獲得較高的導通電流(ION)。再者,我們懷疑原先於堆疊閘極氧化層時,在原子層沉積(ALD)中使用的前驅物(TMA)預處理會使二硫化鉬表面造成損傷,我們改用水氣先行的方式也得出較好的結果。爾後,我們於電晶體實驗中證實了,在單層二硫化鉬與閘極氧化層間插入二維的六方晶系氮化硼(hBN),可以使導通電流達到5E-2μA/μm (VD= 1V)等級並擁有高達106的電流開關比(on/off ratio)。之後我們進一步採用“單電晶體萃取技巧”計算出源汲極串聯電阻(RSD)約3.3MΩ*μm;並使用“Y函數”來提取遷移率的電場衰減因子(θ,0.28 V-1)和低電場時的載子遷移率(μ0, 5.86 cm2V- 1s-1);在單層二硫化鉬原子級的厚度下,還能得出如此精良的電性與轉換曲線,我們堅信二維通道電晶體在不久的將來會成為次世代的電子器件。

並列摘要


A comprehensive investigation of Molybdenum Disulfide (MoS2), one of 2D family, was demonstrated throughout the whole thesis, aiming to make a breakthrough in sub-5nm nodes while Si-era is arriving the physical limitation. It revealed promising properties such as atomically thickness, ultra-low edge-contact resistivity and astonishing electrical characteristics within single-layer MoS2 transistor. First, AFM scanning gives RMS surface roughness around 2 Å of both monolayer and multilayer MoS2. Then, FFT/IFFT was applied to the TEM image to obtain the interlayer distance (~6.6 Å). Next, Raman inspection was carried out, which revealed the layer-dependent spectrum according to the difference and ratio of two feature peaks, A1g and E12g. Moreover, PL spectroscopy indicated the EG of SLMoS2, 1.87eV. Besides, we employed STM to acquire EG of multilayer MoS2(:Nb) with respect to its tunneling current. XPS and UPS are adopted to get the metal work function and observe band offset, where VBO within Pd/MoS2(:Nb) was 0.14eV and CBO of AlSiCu/SLMoS2 was about 0.32eV. Furthermore, the carrier density of SLMoS2 and MoS2(:Nb) by fermi-integral were approximate 3.4E18 and 6.2E19 cm-3, respectively. In the second place, TLM was fabricated to explore the ρC, LT and Rsh herein. Pd had the lower ρC and less variation towards p-type MoS2(:Nb) than Ti. Then, top-contact and edge-contact TLM schemes were purposed by BOE wet-etching and plasma dry-etching, respectively, where the actual cross-sectional structure was verified by TEM. The edge-TLM showed well stability and over 102 lower ρC (4.5E-6 Ω*cm2) than the vertical one (3.8E-4 Ω*cm2). In addition, we extracted the interlayer resistivity ρint by MATLAB calculation, arriving in 2.8E-4 Ω*cm2. Thirdly, single-layer (SL) MoS2 transistor was realized and then examined by OM, TEM, and EDS to ensure the fine construction of gate stack and S/D contact. AlSiCu S/D contact performed the overall higher ION than Ti/TiN stacking. Besides, the TMA in-situ pre-treatment within ALD deposition was doubted to damage the MoS2. Furthermore, we demonstrated that hBN-inserted SLMoS2 transistors had a prodigious on-state current (~5E-2 μA/μm, VD= 1V) and large on-off ratio (~106). Afterward, we exploited “single-transistor approach” to compute RSD (3.3 MΩ*μm) and “Y-function method” to extract attenuation factor (θ, 0.28 V-1) and low field mobility (μ¬0, 5.86 cm2V-1s-1), which provide the promising electrical properties. We have faith that the 2D materials will pave a way to be the next-generation electronics in the near future.

參考文獻


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