透過您的圖書館登入
IP:52.15.156.84
  • 學位論文

高耐壓垂直式有機電晶體

High Voltage Endurance Vertical Organic Transistor

指導教授 : 冉曉雯 許根玉

摘要


本論文將針對空間電荷限制電晶體(SCLT)元件以下方電極注入載子時的元件耐壓度作改善。過去SCLT雖然在上注入元件操作下,已可以達到相當優秀的開關特性;換成下方注入載子時,卻因為有機載子傳輸層與基極間缺乏絕緣阻隔而導致容易被漏電流影響,此情況下的SCLT在操作於高偏壓時,漏電流也變大而容易導致電晶體崩潰。以往為了增加SCLT上注入元件的耐壓度,我們會令絕緣層的厚度增加,可有效提高上注入元件的耐壓度;換成下注入元件時,off-state的跨壓在基-集極間而無法有相同效果。因此本論文便以斜向蒸鍍SiOx的方式,多將一層絕緣層包覆在基極之上,不僅增加了有機傳輸層與基極間的能障,使得漏電流降低;也觀察到藉由斜鍍SiOx的方式,可以讓有機傳輸層在填入傳輸通道時的分子排列情形同時被改善了,因而增加了有機傳輸層的等效載子遷移率,令輸出電流上升。

並列摘要


This thesis is to improve the stability of SCLT working by bottom-injection on high-voltage situation. Although SCLT can obtain astonishing switch ability when working as top-injection device, when it comes to bottom-injection device, the lack of insulating layer between the active layer and base electrode results in larger leakage current, under this circumstance when SCLT is functioning at high-voltage situation, the growing leakage current can easily cause the breakdown to the SCLT. We used to coat thicker insulating film to improve the endurance of top-injection SCLT device working on high-voltage situation. However, it cannot improve the high-voltage stability in bottom-injection SCLT device. Therefore, the method we use is to add another insulating layer on base electrode by evaporation deposition in tilting-angle. It raises the energy barrier between the active layer and base electrode, obtaining lower leakage current. Also we've discovered that the tilting-angle evaporation deposition method can improve the arrangement of P3HT polymer in vertical nanometer pores. That is, the effective carrier mobility increases, the output current also increases.

參考文獻


[1] Y.-C. Chao, H.-F. Meng, and S.-F. Horng, “Polymer space-charge-limited transistor,” Appl. Phys. Lett., vol. 88, no. 22, p. 223510, 2006.
[2] Y.-C. Chao, H.-F. Meng, S.-F. Horng, and C.-S. Hsu, “High-performance solution-processed polymer space-charge-limited transistor,” Organic Electronics, vol. 9, no. 3, pp. 310–316, Jun. 2008.
[3] Y.-C. Chao, Y.-C. Lin, M.-Z. Dai, H.-W. Zan, and H.-F. Meng, “Reduced hole injection barrier for achieving ultralow voltage polymer space-charge-limited transistor with a high on/off current ratio,” Appl. Phys. Lett., vol. 95, no. 20, p. 203305, 2009.
[4] Y.-C. Chao, H.-K. Tsai, H.-W. Zan, Y.-H. Hsu, H.-F. Meng, and S.-F. Horng, “Enhancement-mode polymer space-charge-limited transistor with low switching swing of 96 mV/decade,” Appl. Phys. Lett., vol. 98, no. 22, p. 223303, 2011.
[5] Y.-C. Chao, M.-C. Ku, W.-W. Tsai, H.-W. Zan, H.-F. Meng, H.-K. Tsai, and S.-F. Horng, “Polymer space-charge-limited transistor as a solid-state vacuum tube triode,” Appl. Phys. Lett., vol. 97, no. 22, p. 223307, 2010.

延伸閱讀