應用通道保護層於透明非晶態銦鋅錫氧化物薄膜電晶體技術之研究

Study on the effect of channel passivation layer on Transparent Amorphous Indium Zinc Tin Oxide thin film transistors

吳昱達(Yu-Ta Wu)

指導教授 ： 劉柏村 ； 徐嘉鴻

國立交通大學/電機學院/顯示科技研究所/碩士(2014年)

https://doi.org/10.6842/NCTU.2014.00964

摘要

無資料

關鍵字

銦錫鋅氧化物薄膜電晶體 ； 通道保護層

並列摘要

無資料

並列關鍵字

In-Sn-Zn-O TFT ； passivation

參考文獻

[1]K.-H. Lee, J. S. Jung, K. S. Son, J. S. Park, T. S. Kim, R. Choi, et al., "The effect of moisture on the photon-enhanced negative bias thermal instability in Ga–In–Zn–O thin film transistors," Applied Physics Letters, vol. 95, p. 232106, 2009.

[2]K. Jang-Yeon, S. Kyoung-Seok, J. Ji Sim, K. Tae Sang, R. Myung Kwan, P. Kyung-Bae, et al., "Bottom-Gate Gallium Indium Zinc Oxide Thin-Film Transistor Array for High-Resolution AMOLED Display," Electron Device Letters, IEEE, vol. 29, pp. 1309-1311, 2008.

[3]K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, "Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors," Nature, vol. 432, pp. 488-492, 11/25/print 2004.

[4]J. K. Jeong, "Photo-bias instability of metal oxide thin film transistors for advanced active matrix displays," Journal of Materials Research, vol. 28, pp. 2071-2084, 2013.

[5]T. Kamiya, Z. A. K. Durrani, H. Ahmed, T. Sameshima, Y. Furuta, H. Mizuta, et al., "Reduction of grain-boundary potential barrier height in polycrystalline silicon with hot H2O-vapor annealing probed using point-contact devices," Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol. 21, p. 1000, 2003.