一個整合分析優化以及生成的2.5D晶片電源供應網路合成器

自1965年以來，半導體產業一直隨著摩爾定律而發展，然而，許多挑戰隨著物理層面的限制而出現。因此，為了跨越這些限制以及減少設計上的負擔，2.5D IC以及3D IC的技術受到相當大的重視。在本論文中，我們會先著重於如何在邏輯晶片上面生成一個可以通過商業工具驗證的電源供應網路，接著再提出一個用來模擬異質晶片上的電源供應網路的方法。本論文整合了邏輯晶片上的電源供應網路分析、優化以及生成。我們也另外考慮了熱效應以及電源供應板的位置所造成的影響。此外，我們也採用最大流量演算法來解決這個設計階段中所違反之設計規範驗證。在生成電源供應網路之後，我們會建立一個基於節點電壓、線電阻以及金屬層之間的via電阻的靈敏度矩陣。並利用序列線性規劃法來迭代調整靈敏度矩陣，直到IR壓降滿足我們所設的條件。最後，我們採用一個基於TSMC 65nm LP製程的實際電路來測試我們的演算法，其IR-Drop可以降低到供應電壓的2%以內。為了分析2.5D IC的電源供應網路，異質晶片的電源供應網路也需要被納入考量。但是在一般的設計流程中，除了凸塊的位置以及電源區域的分佈以外，其他異質晶片的細部資訊通常無法取得。因此，本論文也提出了一個生成異質晶片電源供應網路的策略法，而實驗結果也證實這個策略法是有效的。

關鍵字

電源供應網；分群法；電壓降

並列摘要

Moore's Law has dominated the IC industry's development since 1965, however, there are still many challenges with the limitation of manufacturing technology up to now. Therefore, 2.5D IC and 3D IC technologies have attracted great attention to reduce design effort. In this thesis, we firstly put emphasis on presenting realistic power network design methodology without IR violation certified by state-of-the-art commercial tool on logic die, and secondly a heuristic will be introduced to model the power delivery network on heterogeneous die. This thesis integrates analysis, optimization and synthesis of power network on logic die. In addition, we consider thermal effect and power pad's positions during the prototyping of power network. A scenario in placement regarding the violation of design rules is considered and resolved by maximum flow algorithm at the same stage. After we obtain of initial power network, we generate a sensitivity matrix which is correlated with nodal voltage and resistances of net and via in metal layers. Furthermore, a Sequential Linear Programming(SLP) will be applied to adjust the sensitivity matrix iteratively until the IR drop constraint is satisfied. Our work is experimented on a real design in TSMC 65nm LP process, and the result validates our framework that the IR-Drop can be reduced to 2% of supply voltage. To analyze the overall power delivery network on 2.5D die, the influence of heterogeneous die's power delivery network should be taken into consideration. However, the detail design information of heterogeneous die is unknown expect the power bump's location and the distribution of the power domains. Hence, a heuristic is proposed to synthesize the power delivery network on heterogeneous die and the result shows that the heuristic is available.

並列關鍵字

Power Delivery Network ； Clustering Method ； IR-Drop

參考文獻

[1] M. Guiney and E. Leavitt, “An Introduction to OpenAccess: An Open Source Data Model and API for IC Design,” in Proceedings of the Asia and South Pacific Design Automation Conference, pp. 434–436, 2006.

[3] S. S.-Y. Liu, C.-J. Lee, C.-C. Huang, H.-M. Chen, C.-T. Lin, and C.-H. Lee, “Effective Power Network Prototyping via Statistical-based Clustering and Sequential Linear Programming,” in Proceedings of the Conference on Design, Automation and Test in Europe, pp. 1701–1706, 2013.

[4] H. Chen, C.-K. Cheng, A. B. Kahng, M. Mori, and Q. Wang, “Optimal Planning for Mesh-Based Power Distribution,” in Proceedings of the Asia and South Pacific Design Automation Conference, pp. 444–449, 2004.

[5] X.-D. Tan, R. Shi, and J.-C. Lee, “Reliability-Constrained Area Optimization of VLSI Power/Ground Networks via Sequence of Linear Programmings,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, pp. 1678–1684, Dec. 2003.

[6] K.-H. Erhard, F. Johannes, and R. Dachauer, “Topology Optimization Techniques for Power/Ground Networks in VLSI,” in Proceedings of the European Design Au- tomation Conference, pp. 362–367, 1992.

國際替代計量

一個整合分析優化以及生成的2.5D晶片電源供應網路合成器

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