聚乙醯胺表面處理對覆晶封裝接合特性之影響研究

本研究主要針對晶片IC 上之聚乙醯胺(polyimide，PI)表面與覆晶封裝的填充底膠(underfill)之間所產生的界面脫層 (delamination) 現象做研究。主要將實驗分為兩大主軸 : 一方面從聚乙醯胺的製程影響因子及表面處理上作研究。另一方面，從錫鉛凸塊(bump)製程中，找出與聚乙醯胺層界面層相關的製程作研究，並搭配不同的製程處理，進而再將實際晶粒封裝後，做一連串的驗證。研究過程中，均藉由掃描式超音波。掃描聲波顯微鏡 (C-mode scanning acoustic microscope，)及掃描電子顯微鏡(scanning electron microscope)等儀器來輔助判斷是否有發生聚乙醯胺保護層與覆晶封裝後的填充膠之間，所產生的界面脫層現象。 1. 本研究結果顯示：(一)使用氮氣(N2)的電漿轟擊在聚乙醯胺表面上，可以得到與Ti/Cu金屬上，最佳的附著力(~72 Mpa)及較高的電阻效果。相較於不同的氣氛的電漿製程處理上，較不易有聚乙醯胺與金屬界面脫層的危機。(二)從不同的凸塊下金屬薄膜(under bump metallization，UBM) 蝕刻及聚乙醯胺表面清洗與表面電漿轟擊的製程整合，可以減少聚乙醯胺基材上金屬物質之殘存，進而改善覆晶封裝後的信賴性測試，因金屬凸塊的擠壓形變，所造成的界面脫層和錫球噴出與毀壞，最後導致的電性失效。

關鍵字

聚乙醯胺,覆晶封裝,填充底膠；界面脫層,表面處理,錫鉛凸塊；電漿,金屬薄膜

並列摘要

This thesis studied the delamination failure of the interface of polyimide with the underfiller layerand other neighboring layers in Flip Chip IC assembly. We first studied process factors affecting the interface property of the polyimide and performed surface treatment for the polyimide to improve the interfacial quality. We also carried out the bump integration process to investigate the correlation of various assembly process stages with the delamination failure and to improve the process yield. We performed reliabity tests after the assembly process to verify the feasibility of the adopted process modifications. In this study, C-mode scanning acoustic microscope (C-SAM) and scanning electron microscope(SEM) were used to study the interface falure between the polyimide and neighboring layers. From the study, we found that, after the nitrogen plasma bombardment on thesurface of the polyimide, the best obtained adhesion strength of the polyimide with the Ti/Cu under-bump-metal (UBM) layer was about 72 Mpa with a satisfactory electrical resistance. The polyimide treated with the N2 plasma bombardment was much less liable to delaminaiton failure as compred with other plasma processes.Moreover, integration of the plasma treatment with other processes, such as UBM etching and PI surface cleaning, could significantly reduce metal residues on the polyimide surface. As a result,metal bridge, solder extrusion deformation and polyimide interface delamination were greatly alleviated, and electrical reliability was improved.

並列關鍵字

polyimide,Flip Chip,Underfill ； delamination,surface treatment ； solder bump,Plasma,UBM

參考文獻

W.T. Lin MOSEL VITELIC INC.”A Novel Method to Prevent the galvanic effect by the N2 gas purging in the Ti/TiN sputter process”,Semiconductor Manufacturing Technology Workshop,IEEE,pp.191-192,Dec. 2002

5. H.K.Yun,K.Cho, J.K.Kim, S.M. Sim and S.Y.Oh,”Adhesion improvement of epoxy resin/polyimide joints by amine treatment of polyimide surface”,Vol. 38,No.4, pp827-834, 1997

7. Pat Hoontrakul,Les H. Sperling, and Raymond A. Pearson,”Understanding the Strengthg of Epoxy-Polyimide Interfaces for Flip Chip Packages”,Device and materials reliability, IEEE, Vol.3,pp.159-166 ,Dec.2003

8. C.J.Chang,T.S.Lin, C.S.Jou,C.Y.Wang,C.P. Chung,C.N. Chou,W.T.Lin, “A Novel Method to Prevent the galvanic effect by the N2 gas purging in the Ti/TiN sputter process” IEEE,pp.191-193,2002

9. R.A. Pearson T.B. Lloyd, ”Adhesion Studies of Polyimide-Epoxy Interfaces in Flip Chip Assemblies”,Advanced Packaging Material,Processes Properities and Interface,IEEE,pp.58-62,Mar. 2000

國際替代計量

聚乙醯胺表面處理對覆晶封裝接合特性之影響研究

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