系統單晶片整合應用之超寬頻基底耦合雜訊抑制技術

An Active Guarding Technique for Wideband Substrate Coupling Noise Suppression in SoC Applications

趙晧名(Hao-Ming Chao)

指導教授 ： 溫瓌岸

國立交通大學/電機學院/電子工程系所/博士(2013年)

https://doi.org/10.6842/NCTU.2013.00740

摘要

本論文針對現今快速發展的系統單晶片(SoC)趨勢，提出了一個可抑制基底耦合雜訊之超寬頻主動保護電路技術。本技術主要包含兩部份：一、雜訊去耦以及偵測機制：此機制提供一低阻抗路徑以將部份基底雜訊去耦合，同時偵測此去耦合之基底雜訊大小。此訊號可再被利用為下級產生前饋抵消剩餘基底雜訊之來源。二、前饋反向訊號以抵消基底雜訊機制：此機制將前級獲得的去耦合基底雜訊訊號反向，並做適當大小調整後重新注入基底以抵消剩餘的基底雜訊。此機制中並包括了一個頻率補償電路，提供系統新的零點以及極點，以增加電路有效頻寬。
除提出本電路技術外，本論文還以UMC90奈米製程技術為例，對五種常見之被動式基底雜訊隔絕方式做特性描述與比較，並得到基底模型以提供此電路技術設計時使用。此電路最終使用UMC90以及UMC180奈米製程下線實作並經量測後所得效能如下：在1GHz之工作頻率以下可以提供至少14dB之雜訊抑制能力，並且一直到20GHz時都仍可提供11dB以上之雜訊抑制能力。此電路核心所佔面積僅為800平方微米，並在1.8伏特之電源供應下消耗2毫安之電流。此電路技術將隨著製程的發展而有著更小的面積需求以及更小的功率消耗，同時有效工作頻寬也會提升。
此外，為證明此電路技術的確可實際應用於單晶片系統上，我們將此電路技術與一振盪頻率為1GHz之電感-電容振盪器整合於單晶片上，並實驗觀察此振盪器在有基底雜訊時，被此電路技術保護及未被保護時的相位雜訊與突波大小差別。實驗結果顯示，在10kHz與10MHz之單頻低頻基底雜訊注入時，此電路可在此振盪器相對頻率之相位雜訊上分別提供18.81dB與16.73dB的突波抑制能力。而當注入接近振盪頻率之多頻基底雜訊時，此電路技術亦經實驗證明可在寬頻範圍內同時抑制多頻基底耦合雜訊，大幅提升振盪器之相位雜訊效能。

關鍵字

基底雜訊 ； 基底耦合雜訊 ； 雜訊隔離 ； 雜訊抑制

並列摘要

In this dissertation, an active guarding technique is proposed for wideband substrate coupling noise suppression in SoC applications. A noise decoupling mechanism is developed to provide a decoupling path and to sense the noise level for generating noise cancellation current. A feed-forward compensation mechanism is also developed to extend the noise suppression bandwidth and to adjust the amplitude of phase-inversed noise cancellation current by introducing a zero and an amplitude controller. Substrate characterization on UMC 90nm CMOS technology is also done for substrate network modeling and for the design parameters’ determination of decoupling factor and the amplitude of noise cancellation current.
Experimental results in UMC 180nm CMOS technology show that more than 14dB noise suppression performance is achieved in a wide frequency range from DC to 1GHz and 11dB until 20GHz, by the cost of a small chip area of 20um x 40um and 2mA current consumption from a 1.8V supply. To be mentioned, the active guarding circuit benefits better performance and lower power consumption as the technology scaling down; thus is suitable for future applications of highly integrated SoC designs. To prove the feasibility on real applications, the proposed active guarding technique is demonstrated for substrate immunity improvement on LC-tank oscillators. Experimental results also show that by applying the active guarding technique to a LC-tank oscillator, more than 16.73dB spur suppression performance is obtained in the frequency range of interest as either low frequencies below 10MHz or high frequencies around the resonant frequency of 1GHz.

並列關鍵字

substrate noise ； substrate coupling ； substrate crosstalk ； substrate isolation ； substrate noise suppression ； substrate coupling noise suppression

參考文獻

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