在PAC平台利用軟體線程加速H.264視訊解碼

Software Pipeline Design for H.264 Decoding on a PAC Platform

周哲賢(Che-Hsien Chou)

指導教授 ： 蔡淳仁

國立交通大學/資訊學院/資訊科學與工程研究所/碩士(2012年)

https://doi.org/10.6842/NCTU.2012.00625

摘要

本論文主旨在於多核心平台上使用software pipeline方法對H.264解碼進行加速。然而在多核心平台上使用software pipeline會有許多overhead 容易導致效能降低，Stage之間如何溝通、buffer的搬運、Hazards的問題和切割Stage的方法等都會造成很高的overhead。本論文使用Circual buffer 和 DMA…等方法降低software pipeline產生的overhead。我們利用PAC Duo平台實作並驗證我們提出的架構。受限於平台的核心數目，我們設計了two-stage的software pipeline。實驗結果software pipeline方法比沒使用software pipeline的效率平均提昇為1.8倍。

關鍵字

H.264

並列摘要

In this thesis, we present a software pipeline architecture to enhance performance of H.264 decoder on multiprocessor platform. However, performance of multiprocessor platform will be decreased easily due to the overhead of the software pipeline architecture such as communication between successive stage,　buffer transfer, problem of Hazard, and computational load balance of the stages. This paper provides a method to reduce the overhead of the software pipeline architecture by using a circual buffer and a DMA. The design has been implemented and verified on a PAC Duo platform. Due to the constraint on the number of DSP cores on the target platform, a two-stage software pipeline is used to implement H.264. As a result, the performance of the two-stage software pipeline architecture is 1.8 times higher on average comparing to conventional implementations.

並列關鍵字

PAC ； Software Pipeline ； H.264

參考文獻

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