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  • 學位論文

利用通道背向散射理論及溫度係數模型分析奈米級金氧半電晶體電子遷移率的劣化之研究

Analysis of Mobility Degradation in Nanoscale DG nMOSFETs Using Channel Backscattering Theory and Temperature Coefficient Method

指導教授 : 陳明哲

摘要


近年來許多的研究指出,當金氧半場效電晶體的元件尺寸縮減到數百奈米至數十奈米時,電子遷移率將隨通道長度減少而遞減。研究指出此電子遷移率的降低是因為載子在元件中有其所對應的飽和速度,其載子將無法超越此一速度。所以此篇論文主旨在於探討當元件尺寸縮減時,將面臨平衡態區域範圍的縮減。因此我們利用的模擬軟體TCAD模擬奈米級雙閘極電晶體的特性,其中我們考慮了擴散飄移模型以及量子效應。在此我們為了獲得其不受飽和速度影響的電子遷移率,必須要在極小的汲極偏壓下模擬。除此之外利用通道背向散射理論來解釋其飽和速度的現象,並且利用其隨溫度變化的特性來加以分析。最後比較模擬的臨界散射長度以及計算值間的差異性,加以修正而得其合理之結果。

並列摘要


In recent years, many investigations point out that mobility would degrade with the channel length scaling down in nanoscale MOSFETs. It is suggested that the reason for the mobility degradation is caused by the corresponding saturation velocity. The carrier velocity cannot excess this limit in nature. Therefore, we focus on the exploration of the mobility decrease in drain current linear region with channel length shrinkage. First, we simulate the DG nMOSFET characteristics by using TCAD simulator. In the simulation, we consider the drift-diffusion model and quantum effect. In order to extract the real mobility at equilibrium condition, we simulate the case at VD=1mV. Furthermore, we use the channel backscattering theory to explain the effect of saturation velocity and use the temperature coefficient method to analyze the variation between the two methods. Finally, we compare the error of the critical scattering length between the simulation result and the calculation result, along with the correction to get a feasible result.

參考文獻


[1] A. Pirovano, A. Lacaita and A. Spinelli, “Two-dimensional quantum effects in nanoscale MOSFETs,” IEEE Trans. Electron Devices, vol. 49, no. 1, pp25-31, Jan. 2002.
[2] M. S. Lundstrom, “Elementary scattering theory of the Si MOSFET,” IEEE Electron Device Letters, vol. 18, no. 7, pp. 361-363, July 1997.
[3] M. J. Chen, H. T. Huang, K. C. Huang, P. N. Chen, C. S. Chang and C. H. Diaz, “Temperature dependent channel backscattering coefficients in nanoscale MOSFETs,” in IEEE IEDM Tech. Dig., pp. 39-42, 2002.
[4]D. M. Caughey and R. E. Thomas, “Carrier mobilities in Silicon empirically related to doping and field,” Proc. IEEE, pp. 2192–2193, Dec. 1967.
[5] M. J. Chen and L. F. Lu, “A parabolic potential barrier-oriented compact model for the kbT layer’s width in Nano-MOSFETs,” IEEE Trans. Electron Devices, vol. 55, no. 5, pp. 1265-1268, May 2008.

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