應用於數位視頻廣播系統中之自動增益放大器 及接受端濾波器設計

Automatic Gain Control and Continuous-Time Receive Filter in DVB-T/H Receiver Design

黃佳淳(Jia-Chun Huang)

指導教授 ： 薛木添

國立中央大學/資訊電機學院/電機工程學系/碩士(2006年)

摘要

在本論文中，描述一個類比前端電路，主要是以基頻接收端通訊系統應用為目標，應用在數位視頻廣播系統中。內包含一個經由數位控制的自動增益放大器和一個抗混淆濾波器。在接收端的信號路徑上包含一個可程式化增益放大器，這個類比的放大器擁有51dB 的動態增益範圍，並且由一階的數位控制迴路來自動調整其增益量。使其輸出可到達160mVpp。在輸入震幅也是160mVpp 的情況下，經由 雙端輸入模擬出的全諧波失真(THD)小於 -60dB。此設計已使用台灣積體電路公司所提供 0.18 微米 CMOS 製程製作。操作在1.8V 電壓下，消耗功率為13 毫瓦。緊接著這個自動增益放大器是一個頻寬為4MHz 的五階Chebyshev 低通濾波器，此外一個運算跨導放大器(OTA)將被運用在這個濾波器中。輸入震幅為160mVpp模擬出的全諧波失真(THD)小於 -60dB。操作電壓在1.8V，此電路將被驗證在佈局後(post-layout)的模擬上。

關鍵字

濾波器 ； 自動增益放大器 ； 數位視頻廣播系統

並列摘要

This paper describes a digitally controlled automatic gain control (AGC) and anti-aliasing
filter subsystems for the analog front-end (AFE), in which it can be used to support the digital video broadcasting in DZIF (double conversion with zero second IF) architecture. The receiving path contains a programmable-gain amplifier (PGA) with the self-tuning gain circuit. The dynamic range of the PGA, which is controlled by a digital loop to form a first order system, is 51dB. The third-harmonic distortion is less than -60dB for differential input signal up to 160mVpp. This chip has already been fabricated in a TSMC 0.18μm standard CMOS technology while the supply voltage is 1.8V and its power consumption is 13mW. Following the proposed AGC, a 4-MHz fifth-order Chebyshev low-pass Gm-C filter is also described in detail. In addition, an operational transconductance amplifier (OTA) with an additional enhanced amplifier structure is utilized to perform the voltageto-current conversion. The THD is less than -60dB over the input range of 160mVpp and the supply voltage is 1.8V. This proposed filter has also been completely verified by the post-layout simulation.

並列關鍵字

DVB-T/H ； AGC ； Filter

參考文獻

(2004-11): Digital Video Broadcasting (DVB); Transmission System for Handheld

Channel Coding and Modulation for Digital Terrestrial Television, 1997.

I. Way, ¡§A VLSI Design of Dual-Loop Automatic Gain Control for Dual-Mode

[5] Jan Crols and Michiel S. J. Steyaert, ¡§Low-IF Topologies for High-Performance Analog

Systems¡VII: Analog and Digital Signal Processing, Vol. 45, no. 3, MARCH 1998.