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  • 學位論文

一個具有改良質量塊塌陷之CMOS MEMS三角積分加速度器的設計

The Design of A CMOS MEMS Sigma-Delta Accelerometer with Improving the Subsiding of the Proof Mass

指導教授 : 朱元三 李順裕
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摘要


本論文為一個整合CMOS-MEMS微型加速度計與CMOS電路於單一晶片中的閉迴路二階機電式三角積分調變器。其中包含用標準CMOS製程完成的微型加速度計與CMOS電子電路。其功能主要是將外界的加速度訊號藉由能量的轉換,轉換成電壓訊號,再透過電子電路檢測加速度大小。在設計上我們將機械結構的各項參數、機械雜訊與電路雜訊納入考量來完成設計。 在CMOS-MEMS微型加速度計中,質量塊的塌陷與應力外框的翹曲皆會造成梳狀電極的重疊面積過小,從而使感測電容不足而無法檢測加速度。因此我們針對此部分從結構組成上下手,改善結構的塌陷程度與外框翹曲的問題以提升梳狀電極的感測面積。在電路上我們也建立包含電路中非理想效應建立模擬系統,最後整合設計微型加速度計時所取得的參數與電路非理想效應來完成微機電與電子電路的整合與設計。 本論文所實現的晶片是採用TSMC 0.18μm 1P6M CMOS MEMS製程搭配國家晶片系統設計中心(CIC)所提供的微機電後製程;加速度計檢測的加速度範圍為±1.48g、靈敏度為486μV/g;在系統的取樣頻率為2MS/s,輸入頻率為1.024kHz時,訊號雜訊失真比(SNDR)為64.0425dB,動態範圍為67dB,整個晶片的面積為1.848 X 1.926 mm2,並且消耗約4.63mW的功率。

並列摘要


This paper integrates the CMOS-MEMS accelerometer with the CMOS Circuit as a closed-loop, micro-electro-mechanical Sigma-Delta modulator. It contain a Micro-accelerometer which uses the standard CMOS process and the CMOS Circuit. It can transform the acceleration to the voltage signals, and then the voltage signals can be detected by using the detecting Circuit. In this design, the parameter of micro-machined, the mechanical noise, and the circuit's noise are also analyzed in the implementation. In this design of CMOS-MEMS Micro-accelerometer, the subsiding of the proof mass and the warping stress of the stress frame lead to the small overlap area of the fingers, and then the acceleration signals will be hardly detected. We improved the subsiding of proof mass and the out of plane warping of the stress frame to enhance the overlap area of the fingers. We also establish the simulation system which included the non-ideal effects. Finally, we combined the parameter of the micro-accelerometer and the non-ideal effects of the circuit to finish the integration of the CMOS-MEMS and the CMOS Circuits. This chip is fabricated in TSMC 0.18μm 1P6M CMOS MEMS Process, with the post process provided by Nation Chip Implementation Center (CIC). The sense range of the micro-structure is between ±1.48g, and the sensitivity of this micro-structure is 486μV/g. The system's signal-to-noise-distortion ratio is 64.0425dB and the dynamic range is 67dB with a sampling frequency of 2MHz and an input frequency of 1024Hz. The total chip area is 1.848 X 1.926 mm2 and the power consumption is 4.63mW.

並列關鍵字

Residual Stress Sigma-Delta CMOS MEMS

參考文獻


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