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  • 學位論文

毫米波CMOS-MEMS反射式相移器之設計

Design of Microwave CMOS-MEMS Refection-Type Phase Shifter

指導教授 : 張嘉展
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摘要


本論文以TSMC 0.18-μm與UMC 0.18-μm CMOS微機電製程製作應用於毫米波段不同架構設計之反射式相移器。使用微機電指叉式可變電容作為反射式負載,分別置入枝幹耦合器、威爾金森功率分配器與主動式循環器,並以靜電式魚骨型致動器,改變指叉間距,進而改變負載虛部阻抗,達到相位調控的效果。 第一個電路為利用枝幹耦合器設計之連續可調反射式相移器,使用TSMC 0.18 μm-CMOS微機電製程所製作,主要針對致動器架構重新設計,針對靜電吸引理論之靜電吸附現象的限制作探討,利用懸臂與電極間瞬間吸附以前的三分之一位移間距來做為指叉電容連續可調的空間,進而連續調控相位。 第二個晶片設計是利用新的UMC 0.18-μm CMOS-MEMS製程實現威爾金森設計之切換可調反射式相移器,本架構使用威爾金森功率分配器(Wilkinson power divider)取代傳統耦合器架構,有別於以往需兩組相同的反射式負載,僅需單端式負載(single-end loading),指叉電容藉由兩組共生的rotor fingers位移不對稱之方式配合中間梳狀定子結構,可達九組不同狀態切換,將切換狀態帶入另一新的里程碑。量測結果於頻率65 GHz最大相位切換可達 ,整體晶片面積為1.03 mm2。 第三個晶片為針對微機電整合主動電路的想法提出一利用主動式循環器設計之反射式相移器,此電路使用TSMC 0.18-μm CMOS微機電製程所製作,同樣使用單端式負載指叉式電容,使切換狀態達到九組。利用主動電路優勢加入Buffer設計,降低植入損耗,操作頻率於24GHz,相位可調 ,晶片面積為1.86 mm2。

並列摘要


In this thesis, three types of phase shifter using CMOS-MEMS technologies based on different structures are analyzed, designed and fabricated. By changing the spacing of interdigitated capacitors, the reactance can be varied, leading to the phase change. The first circuit is a branch-line coupler-based reflection-type phase shifter with continuous-phase-tuning mechanism, which is fabricated in TSMC 0.18-μm CMOS process. The main goal of this work is to investigate the cantilever displacement due to the electrostatic attraction before pull-in happens, which will give the circuit a certain range for continuously phase tuning. The second circuit is Wilkinson power-divider-based reflection-type phase shifter fabricated in UMC 0.18-μm CMOS-MEMS process. Instead of using two identical loadings, this topology only requires single loading. In this case, the single-end interdigital capacitance is constructed using two rotor fingers to move asymmetrically with one stator comb set in the middle of them, therefore nine states can be achieved. The measurement results show that maximum phase range is , and the chip size is 1.03 mm2. The third design is an active-circulator-based reflection-type phase shifter in TSMC 0.18-μm CMOS-MEMS process. The nine-states single-end interdigital capacitance is integrated with an active circulator, while two buffers are added to boost the output power. Simulation result shows the phase range is at 24 GHz, and the whole chip size is 1.86 mm2.

並列關鍵字

無資料

參考文獻


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被引用紀錄


林冠瑋(2015)。使用TSMC及UMC 0.18 μm CMOS-MEMS 製程之毫米波前端電路設計〔碩士論文,國立中正大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0033-2110201614035097

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