多核心即時視訊編碼器與DSP實現

H.264是現今最常採用的商業視訊編碼標準，尤其是應用在視訊電話和視訊監控系統。然而早期視訊設備因硬體限制和價格考量為了達到即時編碼，大多採用30萬畫素低解析度(640480)和15張低畫面率(frame per second: fps)的視訊，以至於當影像經放大解析後，常常導致影像品質模糊和畫面遺漏的情形，因此無法進行影像識別和監控。為了克服此問題，本論文提出高效能多核心視訊編碼器，並進一步嵌入至ADSP-BF609的數位訊號處理(digital signal processing: DSP)開發板中，來完成來完成高解析度即時H.264視訊編碼器與DSP的硬體實現。 H.264視訊標準雖然有良好的影像品質與壓縮效能，但相對的編碼運算複雜度非常高，導致實現在運算速度較慢且記憶體空間有限的單核心DSP嵌入式系統時，很難達到即時(real-time)視訊之應用。為了提升H.264在DSP嵌入式系統的編碼速度，本論文採用多核心DSP嵌入式系統。由於多核心嵌入式系統可分為異質多核心與同質多核心，其中異質多核心主要是針對不同的運算需求使用不同功能的核心，而同質多核心則是每個核心的硬體架構皆相同，非常適合平均分工的平行處理。由於H.264視訊編碼的運算複雜度非常高，為了能有效的運用平行處理來加速H.264編碼器達到即時視訊傳輸，我們將採用同質多核心的DSP嵌入式系統，並提出一適合運行在ADSP-BF609開發板的H.264平行演算法。平行處理的架構主要分為指令級平行(instruction-level parallelism: ILP)、任務級平行(task-level parallelism: TLP)和數據級平行(data-level parallelism: DLP)三種，因為ILP需要硬體架構的支援，而TLP適合在作業系統(OS)環境下來進行平行處理的排程，因此我們使用DLP來進行多核心H.264編碼器的平行處理的排程。由於H.264的編碼架構分為畫面組層(group of picture: GOP layer)、畫面層(frame layer)、片段層(slice layer)和巨方塊層(macro block: MB layer)，經各層的資料結構分析，我們發現Slice layer具有資料依賴性低和所需記憶體空間少的特性。因此，本論文利用Slice layer 的資料來進行數據級平行(DLP)處理，完成H.264(slice-level parallelism: SLP)的即時編碼架構。論文首先針對雙核心SLP編碼系統架構和記憶體進行規劃，其中一核心為主端(master)來主導H.264編碼流程，另一核心從端(slave)負責視訊編碼。為了能達到標準畫質(standard definition: SD)解析度(720480)的即時視訊編碼，我們進一步提出八核心SLP編碼系統架構，一Mater核心來主控另七個Slave核心進行H.264視訊編碼。經由不同解析度之影像序列及不同影像品質的量化參數(quantization parameter: QP)進行多核心DSP的測試與模擬，從實驗結果顯示本論文所提高解析度八核心SLP之H.264視訊編碼系統，在SD解析度時可達30 fps以上，完成即時編碼，在HD解析度時仍可達到約為15 fps，適合直接應用在現今的視訊監控產品上。

關鍵字

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並列摘要

Nowadays, H.264 video standard is widely used in many commercial applications, especially used for videophone and surveillance systems. However, most of early surveillance equipment adopts low-resolution (640×480 pixels) and low frame rate (15 frame per second: fps) video standard due to the consideration of hardware and cost. This leads to an obstacle for image recognition and loss since the quality of enlarged image maybe blurring and skipped. In order to overcome this problem, a high efficiency multicore digital signal processor (DSP) video codec is embedded on ADSP-BF609. Finally, we achieve an embedded H.264 baseline encoder for standard definition (SD) video transmission. H.264 video coding can achieve high image quality and compression efficiency. However, the complexity of its coding operation results in the difficulty of real-time video applications for embedded system with slow computing speed and limited memory space. Multicore embedded system can be divided into heterogeneous and homogeneous multicore. Heterogeneous multicore performs different operations according to different core hardware architecture. On the other hand, the hardware architecture of each core in the homogeneous multicore is the same. Therfore, homogeneous multicore is more suitable to H.264 video encoder with large computational complexity. Therefore, a highly efficient multcore DSP embedded H.264 encoder system is proposed in this thesis. In order to perform a real-time H264 SD embedded video encoder. We exploit the high computing performance offered by this eightcore ADSP-BF548 in order to meet the real-time encoding compliant. To enhance the encoding speed, slice-level parallelism (SLP) approach is applied. A master core is reserved to handle data transfers to and from ADSP-BF548. Multithreading algorithm combined with a ping-pong buffers technique are exploited in order to optimize the standard SLP approach and communication. Experimental results show that our enhanced SLP implementation allows achieving real-time SD video encoding by reaching up to 30 fps as encoding speed. It is obvious that the proposed multcore embedded H.264 video encoder can be directly applied to consumer high-resolution video applications.

並列關鍵字

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參考文獻

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[22] 陳奕安編著 ”高效能H.265/HEVC視訊解碼器在DSP平台的實現與分析” 義守大學電子工程研究所碩士論文, 中華民國一百零四年七月。

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[10] Z. Xiao, S. Le and B. Baas, “A fine-grained parallel implementation of a H.264/AVC encoder on a 167-processor computational platform”, Signals, Systems and Computers (ASILOMAR), 2011 Conference Record of the Forty Fifth Asilomar Conference on. IEEE, pp. 2067-2071, Nov.2011

[14] N. Bahri, T. Grandpierre, M.A.B. Ayed, N. Masmoudi and M. Akil, “GOP level parallelism implementation for real-time H264/AVC video encoder on multicore DSP TMS320C6472”, 2014 6th European Embedded Design in. IEEE, Sept.2014.

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多核心即時視訊編碼器與DSP實現

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