應用於超寬頻系統之低雜訊放大器設計

DESIGN OF A LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND APPLICATION

曾建偉(Jian-wei Tseng)

指導教授 ： 蔡明傑

大同大學/電機資訊學院/電機工程學系所/碩士(2007年)

摘要

本論文描述低雜訊放大器（low noise amplifier）在超寬頻射頻通訊系統（UWB radio frequency system）的研究發展及提出了一個方法來獲得良好的輸出阻抗匹配。傳統的超寬頻低雜訊放大器(UWB LNA)在輸出級最常見的就是加一個輸出緩衝器（output Buffer）來做阻抗匹配，而這樣的阻抗大小可以由1/gm的方法來獲得，即為一個射級隨耦器的架構，然而其增益比小於1，所以整體的増益會略為下降，並且會有較高的雜訊指數（noise figure），因此我們移除了輸出緩衝器，取而代之的是一個由電感及電容並聯的形式，而這樣的目的理論上可以得到較少的功率消耗及更低的雜訊指數，而且和一般常見的電路比較而言，元件簡化了許多，對於所需要使用的面積可以更小更精簡。由模擬的結果可以看出從3GHz到5GHz 只有2.124dB 的最小雜訊指數和介於12.6dB到8.9dB的電壓増益；在可接受的迴轉損失(return loss)也只有23.4mW的功率消耗。
最後所設計的電路由台積電0.18μm 1P6M CMOS所製成，並在學校的RF實驗室得到量測結果，從3.4GHz 到4.8GHz 結果可看出S21有12.93dB max 而且很平坦；S11，S22也低於 -10dB。

關鍵字

放大器 ； 超寬頻

並列摘要

This thesis describes the development of low noise amplifier (LNA) in ultra-wideband radio frequency system. A methodology for LNA output impedance matching by using an LC-tank structure instead of output MOSFET in general UWB LNA design.Theoretically the main benefits we may get are less power consumption and lower noise figure. The simulation result shows noise figure from 3GHz to 5GHz has only 2.145 dB minimum and power gain between 12.6dB to 8.9dB. Also the power consumption is only 23.4mW with acceptable output and input return loss.
At last the circuit was fabricated by 0.18μm 1P6M CMOS process. The on die measurement performed in RF lab which indicated the S21 is flat with 12.93dB maximum and S11, S22 are below -10dB between 3.4GHz to 4.8GHz.

並列關鍵字

UWB ； LNA

參考文獻

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