本篇論文主要描述一個應用在液晶顯示的源極驅動電路之線性12位元數位類比轉換器(DAC)。此架構使用分段式技巧,將12位元數位類比轉換器所需之4096對1選擇器的複雜度,降成只需三組4位元選擇器的子數位類比轉換器。此三組子DAC的輸出電壓利用一切換式電容加法器將其值加起來產生最後輸出,此加法器內使用的運算放大器亦可當成輸出緩衝器使用,因此不會增加功率消耗。 本驅動器所採用的是台積電0.35μm 2P4M CMOS製程,使用的電源電壓為5V。單一通道驅動器包含選擇器與切換式電容加法器面積為120μm ×480μm,利用這樣的方式在不需要增加額外的功率消耗下大大降低了源極驅動器的面積。
In this thesis, a linear 12 bit segmented digital-to-analog converter (DAC) for LCD source driver is proposed. This design employs a method that reduces the area of an LCD source driver without increasing extra power consumption. A typical 12-bit resistor-string DAC requires a 4096-to1 selector. The proposed architecture uses three sets of 4-bit subDACs to reduce the complexity of a 12-bits resistor-string DAC. The digital signal selects 3 voltages from the tree subDACs, and then adds these voltages up by a Switched-Capacitor (SC) adder. The Opamp of the SC adder is also used as the output buffer without extra power consumption. The proposed LCD source driver was simulated using TSMC 0.35μm 2P4M CMOS process model with a 5V supply. The area for each channel consisting of selectors and an SC adder is about 120μm ×480μm.