Hardware implementation is needed in critical applications requiring high encryption or decryption speeds. In this thesis, a parallel architecture with efficient hardware implementation of finite field operations is developed to realize high speed scalar multiplication which is the main operation in Elliptic Curve Cryptography (ECC) system. The parallel architecture consists of a point addition module and a point doubling module. For high speed realization, we present a modified point addition module using two finite field multipliers. The experimental results show that the proposed architecture is able to compute GF(2^191) elliptic curve scalar multiplication operations in 84.23 μs on Xilinx VirtexE 3200.