- 期刊
基於線性陣列的高吞吐率快速傅利葉變換的超大型積體電路實現
High-Throughput Rate FFT VLSI Implementation on Linear Array Based Design
並列摘要
In this study, the derivation of the butterfly algorithm is expounded, and the detailed formulas based on Cooley-Tukey algorithm of Fast Fourier transform (FFT) are also presented. On the basis of what is described above, we propose two novel designs of low-cost and high-throughput linear arrays for FFT computations. Compared with popular radix-2/radix-4 structures, the presented radix-2^3/radix-8 architectures reach two to eight times of higher throughput rate. In addition, the proposed design has the features of regularity, modularity, and parallelism. Thus, low hardware complexity can be achieved in VLSI designs.
延伸閱讀
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- 傅志新（2003）。應用於超大型積體電路之多階層時序導向繞線方法〔碩士論文，中原大學〕。華藝線上圖書館。https://doi.org/10.6840/cycu200300655
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- Lin, B. C. (2014). Analytical Area Optimization for VLSI Implementations of FIR and FFT Algorithms [doctoral dissertation, National Chiao Tung University]. Airiti Library. https://doi.org/10.6842/NCTU.2014.00227
- Yang, C. W. (2005). Design and Implementation of VLSI Cell Library for Self-timed Systems [master's thesis, Tatung University]. Airiti Library. https://www.airitilibrary.com/Article/Detail?DocID=U0081-0607200917234624