A novel hardware architecture for the reconstruction of digital holograms with autofocusing is presented in this dissertation. A fast autofocusing algorithm operating on a smaller local block locating at the center of the source digital holograms is proposed. By exploiting global information contained in the local block, accurate focus distance can be computed with less computational complexities. Interval search is also adopted to further accelerate the process. The circuits for the fast autofocusing algorithm and subsequent reconstruction operations are effectively integrated in the proposed architecture. Two FFT cores are shared by the operations for parallel computations with low area costs. The architecture is implemented by field programmable gate array (FPGA), and is used as a hardware accelerator in a network on chip (NOC) system for performance evaluation. Experimental results demonstrate that the proposed circuit exhibits the advantages of high speed computation, low power dissipation and accurate focus distance search and hologram reconstruction for 3D rendering applications.

[1] U. Schnars, C. Falldorf, J. Watson, and W. Juptner, Digital Holography and Wavefront Sensing, 2nd ed. Berlin, Germany: Springer-Verlag, 2015.
[2] P. Langehanenberg, B. Kemper, D. Dirksen, and G. von Bally, “Autofocusing in digital holographic phase contrast microscopy on pure phase objects for live cell imaging,” Appl. Opt., Vol. 47, pp.D176-D182, 2008.
[3] P. Langehanenberg, G. von Bally, B. Kemper, “Autofocusing in digital holographic microscopy,” 3D Res., Vol. 2, pp.1-11, 2011.
[4] M. Dogar, H. A. Ilhan, and M. Ozcan, “Real-time, auto-focusing digital holographic microscope using graphics processors,” Rev. of Scientific Instrum., Vol. 84, 2013.
[5] H. A. Ilhan, M. Dogar and M. Ozcan, “Fast autofocusing in digital holography using scaled holograms,” Opt. Comm., Vol. 287, pp.81-84, 2013.
[6] Y.-H. Seo, H.-J. Choi, D.-W. Kim, “3D scanning-based compression technique for digital hologram video”, Signal Processing: Image Communication, Vol 22, pp. 144-156, 2007.
[7] P. Memmolo, C. Distante, M. Paturzo, A. Finizio, P. Ferraro, and B. Javidi, “Automatic focusing in digital holography and its application to stretched holograms,” Opt. Lett., Vol. 36, pp. 1945-1947, 2011.
[8] C. Trujillo and J. Garcia-Sucerquia, “Comparative analysis of the modified enclosed energy metric for self-focusing holograms from digital lensless holographic microscopy,” Appl. Opt., Vol. 54, pp.5102-5108, 2015.
[9]N. Masuda, T. Sugie, T. Ito, S. Tanaka, Y. Hamada, S. Satake, T. Kunugi, and K. Sato, “Special purpose computer system with highly parallel pipelines for flow visualization using holography technology,” Computer Physics Commun., Vol. 181, pp. 1986-1989, 2010.
[10] C.-J. Cheng, W.-J. Hwang, C.-T. Chen, and X.-J. Lai, “Efficient FPGA-based Fresnel transform architecture for digital holography,” IEEE Journal of Display Technology, Vol. 10, pp.272-281, 2014.
[11] T. Shimobaba, T. Kakue and T. Ito, “Review of fast algorithms and hardware implementations on computer holography,” IEEE Trans. Industrial Informatics, Vol. 12, pp.1611-1622, 2016.
[12] S. Braganza and M. Leeser, “An efficient implementation of a phase unwrapping kernel on reconfigurable hardware,” in Proc. IEEE Int. Conf. Application- Specific Systems, Architectures and Processors, 2008, pp. 138-143.
[13] W. J. Hwang, H. Y. Chen, C. J. Cheng, “Region referenced phase unwrapping architecture for digital holographic microscopy,” Appl. Opt., Vol. 54, pp. A67-A75, 2015.
[14] H. Y. Chen, S.-H. Hsu, W. J. Hwang, and C. J. Cheng, “An Efficient FPGA-Based Parallel Phase Unwrapping Hardware Architecture,” IEEE Trans. Computational Imaging, Accepted for Publication, doi:10.1109/TCI.2017.2663767, Available in IEEE Xplore Feb. 02, 2017.
[15] Y. L. Lee, Y. C. Lin, H. Y. Tu, and C. J. Cheng, ”Phase measurement accuracy in digital holographic microscopy using a wavelength-stabilized laser diode,” Journal of Optics, 025403, 2013.
[16] Thomas M. Kreis, Mike Adams and Werner P. O. Jueptner, “Methods of digital holography: a comparison,” Proc. SPIE 3098, Optical Inspection and Micromeasurements II, (17 September 1997); doi: 10.1117/12.281164.
[17] Altera Corporation, FFT IP core user guide, 2016. [Online]. Available: http://www.altera.com/en US/pdfs/literature/ug/ug fft.pdf, Accessed on: Feb. 1, 2018.
[18] T. Colomb, N. Pavillon, J. Kühn, E. Cuche, C. Depeursinge and Y. Emery, “Extended depth-of-focus by digital holographic microscopy,” Opt. Lett., Vol. 35, 2010.
[19] M. Rivera, F. J. Hernandez-Lopez, and A. Gonzalez, “Phase unwrapping by accumulation of residual maps,” Opt. Lasers Eng., vol. 64, pp. 51–58, 2015.
[20] W. Gao, N. T. T. Huyen, H. S. Loi, and Q. Kemao, “Real-time 2D parallel windowed Fourier transform for fringe pattern analysis using graphics processing unit,” Opt. Express, vol. 17, pp. 23147–23152, 2009.
[21] P. A. Karasev, D. P. Campbell, and M. A. Richards, “Obtaining a 35x speedup in 2d phase unwrapping using commodity graphics processors,” in Proc. IEEE Radar Conf., 2007, pp. 574–578.
[22] B. Bhaduri et al., “Diffraction phase microscopy: Principles and applications in materials and life sciences,” Adv. Opt. Photon., vol. 6, pp. 57–119, 2014.
[23] O. Backoach, S. Kariv, P. Girshovitz, and N. T. Shaked, “Fast phase processing in off-axis holography by CUDA including parallel phase unwrapping,” Opt. Express, vol. 24, pp. 3177–3188, 2016.
[24] W. J. Hwang, S. C. Cheng, and C. J. Cheng, “Efficient phase unwrapping architecture for digital holographic microscopy,” Sensors, vol. 11, pp. 9160–9181, 2011.
[25] Y. Jiao, H. Lin, P. Balaji, and W. Feng, “Power and performance characterization of computational kernels on the GPU,” in Proc. IEEE/ACM Int. Conf. Green Comput. Commun., 2010, pp. 221–228.
[26] B. Duan,W.Wang, X. Li, C. Zhang, P. Zhang, and N. Sun, “Floating-point mixed-radix FFT core generation for FPGA and comparison with GPU and CPU,” in Proc. IEEE Int. Conf. Field Programmable Technol., 2011, pp. 1–6.